score misc: Clean up Doxygen #13 (GCI 2012)

This patch is a task from GCI 2012 which improves the Doxygen
comments in the RTEMS source.

http://www.google-melange.com/gci/task/view/google/gci2012/8013205

10 files changed, 76 insertions, 6 deletions

diff --git a/cpukit/score/cpu/nios2/irq.c b/cpukit/score/cpu/nios2/irq.c
index b7123151f0..5750f1311f 100644
--- a/cpukit/score/cpu/nios2/irq.c
+++ b/cpukit/score/cpu/nios2/irq.c
@@ -1,8 +1,12 @@
-/*
- *  NIOS2 exception and interrupt handler
+/**
+ * @file
  *
- *  Derived from c4x/irq.c
+ * @brief NIOS2 Exception and Interrupt Handler
  *
+ * @note Derived from c4x/irq.c
+ */
+
+/*
  *  COPYRIGHT (c) 1989-2007.
  *  On-Line Applications Research Corporation (OAR).
  *
@@ -78,7 +82,7 @@ RTEMS_INLINE_ROUTINE void __IIC_Handler(void)
 
     active = _Nios2_Get_ctlreg_ipending();
   }
-  
+
 }
 
 void __ISR_Handler(void)
@@ -100,7 +104,7 @@ void __ISR_Handler(void)
   _Thread_Dispatch_increment_disable_level();
 
   __IIC_Handler();
-  
+
   /* Make sure that interrupts are disabled again */
   _CPU_ISR_Disable( level );
 
diff --git a/cpukit/score/cpu/nios2/nios2-initialize.c b/cpukit/score/cpu/nios2/nios2-initialize.c
index e192d774e6..6f316b8dd0 100644
--- a/cpukit/score/cpu/nios2/nios2-initialize.c
+++ b/cpukit/score/cpu/nios2/nios2-initialize.c
@@ -1,3 +1,9 @@
+/**
+ * @file
+ *
+ * @brief NIOS2 CPU Initialize
+ */
+
 /*
  * Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
  *
diff --git a/cpukit/score/cpu/nios2/nios2-isr-install-raw-handler.c b/cpukit/score/cpu/nios2/nios2-isr-install-raw-handler.c
index ee566b8a64..702a36792e 100644
--- a/cpukit/score/cpu/nios2/nios2-isr-install-raw-handler.c
+++ b/cpukit/score/cpu/nios2/nios2-isr-install-raw-handler.c
@@ -1,3 +1,9 @@
+/**
+ * @file
+ *
+ * @brief NIOS2 CPU ISR Install Raw Handler
+ */
+
 /*
  * Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
  *
diff --git a/cpukit/score/cpu/nios2/nios2-isr-install-vector.c b/cpukit/score/cpu/nios2/nios2-isr-install-vector.c
index cf5cc278c6..eed1a38242 100644
--- a/cpukit/score/cpu/nios2/nios2-isr-install-vector.c
+++ b/cpukit/score/cpu/nios2/nios2-isr-install-vector.c
@@ -1,3 +1,9 @@
+/**
+ * @file
+ *
+ * @brief NIOS2 CPU ISR Install Vector
+ */
+
 /*
  * Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
  *
diff --git a/cpukit/score/cpu/nios2/nios2-isr-set-level.c b/cpukit/score/cpu/nios2/nios2-isr-set-level.c
index 99964764ae..a753a4f7a6 100644
--- a/cpukit/score/cpu/nios2/nios2-isr-set-level.c
+++ b/cpukit/score/cpu/nios2/nios2-isr-set-level.c
@@ -1,3 +1,9 @@
+/**
+ * @file
+ *
+ * @brief NIOS2 ISR Set Level
+ */
+
 /*
  * Copyright (c) 2011 embedded brains GmbH
  *
diff --git a/cpukit/score/cpu/nios2/nios2-mpu-descriptor.c b/cpukit/score/cpu/nios2/nios2-mpu-descriptor.c
index dd97a29023..126320f9c5 100644
--- a/cpukit/score/cpu/nios2/nios2-mpu-descriptor.c
+++ b/cpukit/score/cpu/nios2/nios2-mpu-descriptor.c
@@ -1,3 +1,9 @@
+/**
+ * @file
+ *
+ * @brief NIOS2 MPU Descriptor
+ */
+
 /*
  * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
  *
diff --git a/cpukit/score/cpu/nios2/nios2-mpu-disable-protected.c b/cpukit/score/cpu/nios2/nios2-mpu-disable-protected.c
index 77a00fde61..f43ac38dd3 100644
--- a/cpukit/score/cpu/nios2/nios2-mpu-disable-protected.c
+++ b/cpukit/score/cpu/nios2/nios2-mpu-disable-protected.c
@@ -1,3 +1,9 @@
+/**
+ * @file
+ *
+ * @brief NIOS2 MPU Disable Protected
+ */
+
 /*
  * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
  *
diff --git a/cpukit/score/cpu/nios2/nios2-thread-dispatch-disabled.c b/cpukit/score/cpu/nios2/nios2-thread-dispatch-disabled.c
index b939e02e8b..73b383f29a 100644
--- a/cpukit/score/cpu/nios2/nios2-thread-dispatch-disabled.c
+++ b/cpukit/score/cpu/nios2/nios2-thread-dispatch-disabled.c
@@ -1,3 +1,9 @@
+/**
+ * @file
+ *
+ * @brief NIOS II Specific Thread Dispatch Disabled Indicator.
+ */
+
 /*
  * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
  *
diff --git a/cpukit/score/cpu/nios2/rtems/score/cpu.h b/cpukit/score/cpu/nios2/rtems/score/cpu.h
index 68ab01df34..7beb4ec06f 100644
--- a/cpukit/score/cpu/nios2/rtems/score/cpu.h
+++ b/cpukit/score/cpu/nios2/rtems/score/cpu.h
@@ -290,7 +290,7 @@ uint32_t _CPU_ISR_Get_level( void );
 
 /**
  * @brief Initializes the CPU context.
- * 
+ *
  * The following steps are performed:
  *  - setting a starting address
  *  - preparing the stack
@@ -318,14 +318,26 @@ void _CPU_Context_Initialize(
 
 void _CPU_Fatal_halt( uint32_t _error ) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
 
+/**
+ * @brief CPU Initialize
+ *
+ */
 void _CPU_Initialize( void );
 
+/**
+ * @brief CPU ISR Install Raw Handler
+ *
+ */
 void _CPU_ISR_install_raw_handler(
   uint32_t vector,
   proc_ptr new_handler,
   proc_ptr *old_handler
 );
 
+/**
+ * @brief CPU ISR Install Vector.
+ *
+ */
 void _CPU_ISR_install_vector(
   uint32_t vector,
   proc_ptr new_handler,
diff --git a/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h b/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h
index 022990d919..b99dd02cd2 100644
--- a/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h
+++ b/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h
@@ -307,6 +307,10 @@ static inline bool _Nios2_Has_internal_interrupt_controller( void )
   return _Nios2_ISR_Get_status_mask() == NIOS2_ISR_STATUS_MASK_IIC;
 }
 
+/*
+ *  @brief Nios2 ISR Set level
+ *
+ */
 uint32_t _Nios2_ISR_Set_level( uint32_t new_level, uint32_t status );
 
 typedef struct {
@@ -399,6 +403,10 @@ bool _Nios2_MPU_Setup_region_registers(
   uint32_t *mpuacc
 );
 
+/**
+ * @brief Nios2 MPU Get region descriptor.
+ *
+ */
 bool _Nios2_MPU_Get_region_descriptor(
   const Nios2_MPU_Configuration *config,
   int index,
@@ -488,6 +496,10 @@ static inline void _Nios2_MPU_Restore( uint32_t config )
   _Nios2_Set_ctlreg_config( config );
 }
 
+/*
+ *  @brief Nios2 MPU Disable Protected
+ *
+ */
 uint32_t _Nios2_MPU_Disable_protected( void );
 
 void _Nios2_MPU_Reset( const Nios2_MPU_Configuration *config );