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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-09-02 07:52:30 +0000 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-09-02 07:52:30 +0000 |
commit | 36c187a0cd858d21361e5a5837518f8df94361d3 (patch) | |
tree | 1bddf9b6b39dd12739dc68411a175277fd2f6392 /cpukit/score/cpu/nios2/rtems | |
parent | 2011-09-01 Joel Sherrill <joel.sherrilL@OARcorp.com> (diff) | |
download | rtems-36c187a0cd858d21361e5a5837518f8df94361d3.tar.bz2 |
2011-09-02 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/score/nios2-utility.h: Avoid redefines with Altera HAL.
Declare _Nios2_ISR_Set_level().
* nios2-context-initialize.c: Use _Nios2_ISR_Set_level().
* nios2-isr-set-level.c: Define _Nios2_ISR_Set_level().
Diffstat (limited to 'cpukit/score/cpu/nios2/rtems')
-rw-r--r-- | cpukit/score/cpu/nios2/rtems/score/nios2-utility.h | 34 |
1 files changed, 27 insertions, 7 deletions
diff --git a/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h b/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h index 173790f5d7..97a609f3f1 100644 --- a/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h +++ b/cpukit/score/cpu/nios2/rtems/score/nios2-utility.h @@ -103,16 +103,36 @@ #define NIOS2_MPUBASE_BASE_OFFSET 5 #define NIOS2_MPUBASE_BASE_MASK (0x1ffffff << NIOS2_MPUBASE_BASE_OFFSET) #define NIOS2_MPUBASE_INDEX_OFFSET 1 -#define NIOS2_MPUBASE_INDEX_MASK (0x1f << NIOS2_MPUBASE_INDEX_OFFSET) + +/* Avoid redefines with Altera HAL */ +#ifndef NIOS2_MPUBASE_INDEX_MASK + #define NIOS2_MPUBASE_INDEX_MASK (0x1f << NIOS2_MPUBASE_INDEX_OFFSET) +#endif + #define NIOS2_MPUBASE_D (1 << 0) #define NIOS2_MPUACC_MASK_OFFSET 6 -#define NIOS2_MPUACC_MASK_MASK (0x1ffffff << NIOS2_MPUACC_MASK_OFFSET) + +/* Avoid redefines with Altera HAL */ +#ifndef NIOS2_MPUACC_MASK_MASK + #define NIOS2_MPUACC_MASK_MASK (0x1ffffff << NIOS2_MPUACC_MASK_OFFSET) +#endif + #define NIOS2_MPUACC_LIMIT_OFFSET 6 -#define NIOS2_MPUACC_LIMIT_MASK (0x3ffffff << NIOS2_MPUACC_LIMIT_OFFSET) + +/* Avoid redefines with Altera HAL */ +#ifndef NIOS2_MPUACC_LIMIT_MASK + #define NIOS2_MPUACC_LIMIT_MASK (0x3ffffff << NIOS2_MPUACC_LIMIT_OFFSET) +#endif + #define NIOS2_MPUACC_C (1 << 5) #define NIOS2_MPUACC_PERM_OFFSET 2 -#define NIOS2_MPUACC_PERM_MASK (0x7 << NIOS2_MPUACC_PERM_OFFSET) + +/* Avoid redefines with Altera HAL */ +#ifndef NIOS2_MPUACC_PERM_MASK + #define NIOS2_MPUACC_PERM_MASK (0x7 << NIOS2_MPUACC_PERM_OFFSET) +#endif + #define NIOS2_MPUACC_RD (1 << 1) #define NIOS2_MPUACC_WR (1 << 0) @@ -286,11 +306,11 @@ static inline uint32_t _Nios2_Get_ISR_status_bits( void ) static inline bool _Nios2_Has_internal_interrupt_controller( void ) { - uint32_t isr_status_mask = _Nios2_Get_ISR_status_mask(); - - return isr_status_mask == NIOS2_ISR_STATUS_MASK_IIC; + return _Nios2_Get_ISR_status_mask() == NIOS2_ISR_STATUS_MASK_IIC; } +uint32_t _Nios2_ISR_Set_level( uint32_t new_level, uint32_t status ); + #ifdef __cplusplus } #endif /* __cplusplus */ |