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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-02-18 18:28:24 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-02-18 18:28:24 +0000 |
commit | 7908ba5b8139c73cc45bacb686199ca48c0d803c (patch) | |
tree | 62de3f920a3b3d270db9185f4d8a64b5d7136a8f /cpukit/score/cpu/mips/rtems/score/types.h | |
parent | Another part of automake VI patch from Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff) | |
download | rtems-7908ba5b8139c73cc45bacb686199ca48c0d803c.tar.bz2 |
Part of the automake VI patch from Ralf Corsepius <corsepiu@faw.uni-ulm.de>:
> 4) rtems-rc-19990202-0.diff /reorg-score-cpu.sh
>
> reorg-score-cpu.sh reorganizes the cpu/<cpu>/* subdirectories in a
> similar manner than previous reorg scripts did. rtems-rc-19990202-0.diff
> contains the diffs after reorg-score-cpu.sh has been run on a
> rtems-19981215 snapshot + my patches up to rtems-rc-19990131-2.diff.
>
> This patch is rather nasty and may break something. However, I've tested
> it for about 10 different target/bsp pairs and believe to have shaken
> out most bugs.
I wonder about the following .h files that were not moved:
a29k/asm.h
a29k/cpu_asm.h
i386/asm.h
i960/asm.h
m68k/asm.h
m68k/m68302.h
m68k/m68360.h
m68k/qsm.h
m68k/sim.h
mips64orion/asm.h
mips64orion/cpu_asm.h
mips64orion/mips64orion.h
no_cpu/asm.h
no_cpu/cpu_asm.h
powerpc/asm.h
powerpc/mpc860.h
sh/asm.h
sparc/asm.h
sparc/erc32.h
Diffstat (limited to 'cpukit/score/cpu/mips/rtems/score/types.h')
-rw-r--r-- | cpukit/score/cpu/mips/rtems/score/types.h | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/types.h b/cpukit/score/cpu/mips/rtems/score/types.h new file mode 100644 index 0000000000..50f28ccf9b --- /dev/null +++ b/cpukit/score/cpu/mips/rtems/score/types.h @@ -0,0 +1,73 @@ +/* mipstypes.h + * + * This include file contains type definitions pertaining to the IDT 4650 + * processor family. + * + * Author: Craig Lebakken <craigl@transition.com> + * + * COPYRIGHT (c) 1996 by Transition Networks Inc. + * + * To anyone who acknowledges that this file is provided "AS IS" + * without any express or implied warranty: + * permission to use, copy, modify, and distribute this file + * for any purpose is hereby granted without fee, provided that + * the above copyright notice and this notice appears in all + * copies, and that the name of Transition Networks not be used in + * advertising or publicity pertaining to distribution of the + * software without specific, written prior permission. + * Transition Networks makes no representations about the suitability + * of this software for any purpose. + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ +/* @(#)mipstypes.h 08/20/96 1.4 */ + +#ifndef __MIPS_TYPES_h +#define __MIPS_TYPES_h + +#ifndef ASM + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * This section defines the basic types for this processor. + */ + +typedef unsigned char unsigned8; /* unsigned 8-bit integer */ +typedef unsigned short unsigned16; /* unsigned 16-bit integer */ +typedef unsigned int unsigned32; /* unsigned 32-bit integer */ +typedef unsigned long long unsigned64; /* unsigned 64-bit integer */ + +typedef unsigned16 Priority_Bit_map_control; + +typedef signed char signed8; /* 8-bit signed integer */ +typedef signed short signed16; /* 16-bit signed integer */ +typedef signed int signed32; /* 32-bit signed integer */ +typedef signed long long signed64; /* 64 bit signed integer */ + +typedef unsigned32 boolean; /* Boolean value */ + +typedef float single_precision; /* single precision float */ +typedef double double_precision; /* double precision float */ + +typedef void mips_isr; +typedef void ( *mips_isr_entry )( void ); + +#ifdef __cplusplus +} +#endif + +#endif /* !ASM */ + +#endif +/* end of include file */ |