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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-09 16:48:26 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-09 16:48:26 +0000 |
| commit | 16ad7eafedff65567c1b9b67af4d422d1673db74 (patch) | |
| tree | 6cfd508724ed2d058f410e465e9542ad76b63f88 /cpukit/score/cpu/mips/rtems/score/cpu.h | |
| parent | 2001-01-09 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-16ad7eafedff65567c1b9b67af4d422d1673db74.tar.bz2 | |
2001-01-09 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
to make it easier to conditionalize the code for various ISA levels.
Diffstat (limited to 'cpukit/score/cpu/mips/rtems/score/cpu.h')
| -rw-r--r-- | cpukit/score/cpu/mips/rtems/score/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h index c0ed92a642..4eda5c35b1 100644 --- a/cpukit/score/cpu/mips/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h @@ -599,7 +599,7 @@ extern unsigned int mips_interrupt_number_of_vectors; #define _CPU_ISR_Disable( _level ) \ do { \ mips_get_sr( _level ); \ - mips_set_sr( (_level) & ~SR_IMASK ); \ + mips_set_sr( (_level) & ~SR_INTERRUPT_ENABLE_BITS ); \ } while(0) /* |