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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-02-05 21:04:39 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-02-05 21:04:39 +0000 |
commit | a37b8f95b71fbf7c3b36ad1db57345a447a1e0c2 (patch) | |
tree | 7f089933cfed27a424ae56d0ec11715b2d1ec4cf /cpukit/score/cpu/mips/idtcpu.h | |
parent | 2001-02-05 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-a37b8f95b71fbf7c3b36ad1db57345a447a1e0c2.tar.bz2 |
2001-02-05 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S: Enhanced to save/restore more registers on
exceptions.
* rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
register individually and document when it is saved.
* idtcpu.h: Added constants for the coprocessor 1 registers
revision and status.
Diffstat (limited to 'cpukit/score/cpu/mips/idtcpu.h')
-rw-r--r-- | cpukit/score/cpu/mips/idtcpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/idtcpu.h b/cpukit/score/cpu/mips/idtcpu.h index bbddf23a1d..90d09a104d 100644 --- a/cpukit/score/cpu/mips/idtcpu.h +++ b/cpukit/score/cpu/mips/idtcpu.h @@ -427,6 +427,9 @@ LICENSED MATERIAL - PROGRAM PROPERTY OF IDT #define C0_ERRPC $30 /* cache error pc */ #endif +#define C1_REVISION $0 +#define C1_STATUS $31 + #endif XDS #ifdef R4650 |