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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-09 16:48:26 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-09 16:48:26 +0000 |
| commit | 16ad7eafedff65567c1b9b67af4d422d1673db74 (patch) | |
| tree | 6cfd508724ed2d058f410e465e9542ad76b63f88 /cpukit/score/cpu/mips/ChangeLog | |
| parent | 2001-01-09 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-16ad7eafedff65567c1b9b67af4d422d1673db74.tar.bz2 | |
2001-01-09 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
to make it easier to conditionalize the code for various ISA levels.
Diffstat (limited to 'cpukit/score/cpu/mips/ChangeLog')
| -rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 39322e3962..0a3eca1838 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,8 @@ +2001-01-09 Joel Sherrill <joel@OARcorp.com> + + * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants + to make it easier to conditionalize the code for various ISA levels. + 2001-01-08 Joel Sherrill <joel@OARcorp.com> * idtcpu.h: Commented out definition of "wait". It was stupid to |