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authorRalf Corsepius <ralf.corsepius@rtems.org>2009-12-04 05:25:30 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2009-12-04 05:25:30 +0000
commit5bb38e15667c03ef44420cdeb7889db42649ece3 (patch)
tree82cf091802d6c2895f2a69ee74ad7373ec77607a /cpukit/score/cpu/m68k/rtems/m68k/m68302.h
parentWhitespace removal. (diff)
downloadrtems-5bb38e15667c03ef44420cdeb7889db42649ece3.tar.bz2
Whitespace removal.
Diffstat (limited to 'cpukit/score/cpu/m68k/rtems/m68k/m68302.h')
-rw-r--r--cpukit/score/cpu/m68k/rtems/m68k/m68302.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/cpu/m68k/rtems/m68k/m68302.h b/cpukit/score/cpu/m68k/rtems/m68k/m68302.h
index d1d828e352..58abf1bdfc 100644
--- a/cpukit/score/cpu/m68k/rtems/m68k/m68302.h
+++ b/cpukit/score/cpu/m68k/rtems/m68k/m68302.h
@@ -227,7 +227,7 @@ enum m68302_ivec_e {
* The DRAM refresh memory map replaces the SCC2 Tx BD 6 and Tx BD 7
* structures in the parameter RAM.
*
- * Access to the DRAM registers can be accomplished by
+ * Access to the DRAM registers can be accomplished by
* the following approach:
*
* volatile m302_DRAM_refresh_t *dram;
@@ -599,7 +599,7 @@ typedef struct {
} m302_dualPortRAM_t;
/* some useful defines the some of the registers above */
-
+
/* ----
MC68302 Chip Select Registers