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authorJoel Sherrill <joel.sherrill@OARcorp.com>1997-07-09 23:33:08 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1997-07-09 23:33:08 +0000
commit8fabc273475a9b73f6b6645265491c524a96aafa (patch)
treea816fe58cb300acb3eb161ff50edc8115cc5e9b2 /cpukit/score/cpu/m68k/rtems/asm.h
parentUpdated to the PowerPC. (diff)
downloadrtems-8fabc273475a9b73f6b6645265491c524a96aafa.tar.bz2
Added sp, sfc, and fpcsr register defines.
Diffstat (limited to 'cpukit/score/cpu/m68k/rtems/asm.h')
-rw-r--r--cpukit/score/cpu/m68k/rtems/asm.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/cpukit/score/cpu/m68k/rtems/asm.h b/cpukit/score/cpu/m68k/rtems/asm.h
index 2f63ddee53..ee800b2280 100644
--- a/cpukit/score/cpu/m68k/rtems/asm.h
+++ b/cpukit/score/cpu/m68k/rtems/asm.h
@@ -80,6 +80,7 @@
#define a5 REG (a5)
#define a6 REG (a6)
#define a7 REG (a7)
+#define sp REG (sp)
#define msp REG (msp)
#define usp REG (usp)
@@ -87,6 +88,7 @@
#define sr REG (sr)
#define vbr REG (vbr)
#define dfc REG (dfc)
+#define sfc REG(sfc)
#define fp0 REG (fp0)
#define fp1 REG (fp1)
@@ -100,6 +102,8 @@
#define fpc REG (fpc)
#define fpi REG (fpi)
#define fps REG (fps)
+#define fpsr REG (fpsr)
+
/*
* Define macros to handle section beginning and ends.