2008-10-02 Joel Sherrill <joel.sherrill@oarcorp.com>

	* .cvsignore, ChangeLog, Makefile.am, context_init.c, context_switch.S,
	cpu.c, cpu_asm.c, preinstall.am, varvects.S, varvects.h, rtems/asm.h,
	rtems/score/cpu.h, rtems/score/cpu_asm.h, rtems/score/m32c.h,
	rtems/score/types.h: New files.

1 files changed, 50 insertions, 0 deletions

diff --git a/cpukit/score/cpu/m32c/rtems/score/types.h b/cpukit/score/cpu/m32c/rtems/score/types.h
new file mode 100644
index 0000000000..0ea860f743
--- /dev/null
+++ b/cpukit/score/cpu/m32c/rtems/score/types.h
@@ -0,0 +1,50 @@
+/**
+ * @file rtems/score/types.h
+ */
+
+/*
+ *  This include file contains type definitions pertaining to the Intel
+ *  m32c processor family.
+ *
+ *  COPYRIGHT (c) 1989-2006.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#ifndef _RTEMS_SCORE_TYPES_H
+#define _RTEMS_SCORE_TYPES_H
+
+#ifndef ASM
+
+#include <stdbool.h>
+#include <rtems/stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This section defines the basic types for this processor.
+ */
+
+/** This defines the type for a priority bit map entry. */
+typedef uint16_t Priority_Bit_map_control;
+
+/** This defines the return type for an ISR entry point. */
+typedef void m32c_isr;
+
+/** This defines the prototype for an ISR entry point. */
+typedef m32c_isr ( *m32c_isr_entry )( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* !ASM */
+
+#endif