diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-05-05 14:19:58 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-05-05 14:19:58 +0000 |
| commit | af2b90de3fc9fe8a4a7c89f1c2f54f10b62ab6e0 (patch) | |
| tree | 6aff077ceea935cebe0e12817b47598a6fd1239b /cpukit/score/cpu/lm32 | |
| parent | Update (diff) | |
| download | rtems-af2b90de3fc9fe8a4a7c89f1c2f54f10b62ab6e0.tar.bz2 | |
2009-05-05 Michael Walle <michael@walle.cc>
* cpu_asm.S, irq.c, rtems/score/cpu.h: Add lm32 gdb stub support.
Diffstat (limited to 'cpukit/score/cpu/lm32')
| -rw-r--r-- | cpukit/score/cpu/lm32/ChangeLog | 4 | ||||
| -rw-r--r-- | cpukit/score/cpu/lm32/cpu_asm.S | 15 | ||||
| -rw-r--r-- | cpukit/score/cpu/lm32/irq.c | 11 | ||||
| -rw-r--r-- | cpukit/score/cpu/lm32/rtems/score/cpu.h | 1 |
4 files changed, 31 insertions, 0 deletions
diff --git a/cpukit/score/cpu/lm32/ChangeLog b/cpukit/score/cpu/lm32/ChangeLog index 01caaeab61..ac385510e3 100644 --- a/cpukit/score/cpu/lm32/ChangeLog +++ b/cpukit/score/cpu/lm32/ChangeLog @@ -1,3 +1,7 @@ +2009-05-05 Michael Walle <michael@walle.cc> + + * cpu_asm.S, irq.c, rtems/score/cpu.h: Add lm32 gdb stub support. + 2009-04-14 Michael Walle <michael@walle.cc> * cpu.h: corrected the registers in Context_Control and diff --git a/cpukit/score/cpu/lm32/cpu_asm.S b/cpukit/score/cpu/lm32/cpu_asm.S index d169c5f611..02e1f6928a 100644 --- a/cpukit/score/cpu/lm32/cpu_asm.S +++ b/cpukit/score/cpu/lm32/cpu_asm.S @@ -54,6 +54,21 @@ _CPU_Context_switch: sw (r1+72), ra rcsr r3, IE sw (r1+76), r3 + .extern _exception_stack_frame + mvhi r3, hi(_exception_stack_frame) + ori r3, r3, lo(_exception_stack_frame) + lw r4, (r3+0) + be r4, r0, 2f +1: + lw r5, (r4+44) + sw (r3+0), r0 + bi 3f +2: + mvhi r5, hi(_Thread_Dispatch) + ori r5, r5, lo(_Thread_Dispatch) +3: + sw (r1+80), r5 + _CPU_Context_switch_restore: lw r11, (r2+0) /* r2 is the second argument */ lw r12, (r2+4) diff --git a/cpukit/score/cpu/lm32/irq.c b/cpukit/score/cpu/lm32/irq.c index 3eb723d3d8..6580405513 100644 --- a/cpukit/score/cpu/lm32/irq.c +++ b/cpukit/score/cpu/lm32/irq.c @@ -28,11 +28,14 @@ unsigned long *_old_stack_ptr; #endif +unsigned long *_exception_stack_frame; + register unsigned long *stack_ptr asm("sp"); void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr) { register uint32_t level; + _exception_stack_frame = NULL; /* Interrupts are disabled upon entry to this Handler */ @@ -77,7 +80,15 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr) if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) { _ISR_Signals_to_thread_executing = FALSE; + + /* save off our stack frame so the context switcher can get to it */ + _exception_stack_frame = ifr; + _Thread_Dispatch(); + + /* and make sure its clear in case we didn't dispatch. if we did, its + * already cleared */ + _exception_stack_frame = NULL; } } diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h index 44d1d23a16..f6b6a9210c 100644 --- a/cpukit/score/cpu/lm32/rtems/score/cpu.h +++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h @@ -482,6 +482,7 @@ typedef struct { uint32_t sp; uint32_t ra; uint32_t ie; + uint32_t epc; } Context_Control; /** |