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authorJoel Sherrill <joel.sherrill@OARcorp.com>2009-04-06 21:23:51 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2009-04-06 21:23:51 +0000
commit504fadbb1a1eca7feccdd9f3b2dc810e1ab1ddbb (patch)
treecafcaa11fb578db3f1d6ecb2d7275e3cd2bf7e33 /cpukit/score/cpu/lm32
parent2009-04-06 Joel Sherrill <joel.sherrill@oarcorp.com> (diff)
downloadrtems-504fadbb1a1eca7feccdd9f3b2dc810e1ab1ddbb.tar.bz2
2009-04-06 Michael Walle <michael@walle.cc>
* cpu_asm.S: We cannot use any other register than r0 without saving them to the stack. (_ISR_Handler clears r0 right at the beginning)
Diffstat (limited to 'cpukit/score/cpu/lm32')
-rw-r--r--cpukit/score/cpu/lm32/ChangeLog5
-rw-r--r--cpukit/score/cpu/lm32/cpu_asm.S1
2 files changed, 6 insertions, 0 deletions
diff --git a/cpukit/score/cpu/lm32/ChangeLog b/cpukit/score/cpu/lm32/ChangeLog
index 26aa15aaac..e4d7ed1c86 100644
--- a/cpukit/score/cpu/lm32/ChangeLog
+++ b/cpukit/score/cpu/lm32/ChangeLog
@@ -1,3 +1,8 @@
+2009-04-06 Michael Walle <michael@walle.cc>
+
+ * cpu_asm.S: We cannot use any other register than r0 without saving
+ them to the stack. (_ISR_Handler clears r0 right at the beginning)
+
2009-02-12 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c, rtems/score/cpu.h: Change prototype of IDLE thread to
diff --git a/cpukit/score/cpu/lm32/cpu_asm.S b/cpukit/score/cpu/lm32/cpu_asm.S
index 9f0e12002d..80501bad1d 100644
--- a/cpukit/score/cpu/lm32/cpu_asm.S
+++ b/cpukit/score/cpu/lm32/cpu_asm.S
@@ -102,6 +102,7 @@ _CPU_Context_restore:
.globl _ISR_Handler
_ISR_Handler:
+ xor r0, r0, r0
addi sp, sp, -128
sw (sp+4), r1
sw (sp+8), r2