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author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-16 11:08:36 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-16 11:08:36 +0000 |
commit | 84c5345224a93f1dc6b67db749b3d3e7020ac6cb (patch) | |
tree | 6234fbe51f02a766ece52732f3711860dc712054 /cpukit/score/cpu/i386/rtems/score/cpu.h | |
parent | 2004-04-16 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
download | rtems-84c5345224a93f1dc6b67db749b3d3e7020ac6cb.tar.bz2 |
Remove stray white spaces.
Diffstat (limited to 'cpukit/score/cpu/i386/rtems/score/cpu.h')
-rw-r--r-- | cpukit/score/cpu/i386/rtems/score/cpu.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h index 6f359fd578..eb75cedcf9 100644 --- a/cpukit/score/cpu/i386/rtems/score/cpu.h +++ b/cpukit/score/cpu/i386/rtems/score/cpu.h @@ -43,7 +43,7 @@ extern "C" { /* * Does the RTEMS invoke the user's ISR with the vector number and - * a pointer to the saved interrupt frame (1) or just the vector + * a pointer to the saved interrupt frame (1) or just the vector * number (0)? */ @@ -70,7 +70,7 @@ extern "C" { /* * Does this port provide a CPU dependent IDLE task implementation? - * + * * If TRUE, then the routine _CPU_Thread_Idle_body * must be provided and is the default IDLE thread body instead of * _CPU_Thread_Idle_body. @@ -78,7 +78,7 @@ extern "C" { * If FALSE, then use the generic IDLE thread body if the BSP does * not provide one. */ - + #define CPU_PROVIDES_IDLE_THREAD_BODY TRUE /* @@ -174,7 +174,7 @@ typedef enum { I386_EXCEPTION_ENTER_RDBG = 50 /* to enter manually RDBG */ } Intel_symbolic_exception_name; - + /* * The following table contains the information required to configure @@ -199,7 +199,7 @@ typedef struct { } rtems_cpu_table; /* - * Macros to access required entires in the CPU Table are in + * Macros to access required entires in the CPU Table are in * the file rtems/system.h. */ @@ -429,10 +429,10 @@ void _CPU_Initialize( /* * _CPU_ISR_install_raw_handler * - * This routine installs a "raw" interrupt handler directly into the + * This routine installs a "raw" interrupt handler directly into the * processor's vector table. */ - + void _CPU_ISR_install_raw_handler( uint32_t vector, proc_ptr new_handler, |