diff options
author | Jan Sommer <jan.sommer@dlr.de> | 2020-05-31 16:22:55 +0200 |
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committer | Chris Johns <chrisj@rtems.org> | 2020-06-11 13:29:11 +1000 |
commit | 5d4a1edca037691da56e54d8c3dde5d0102534e6 (patch) | |
tree | 63ebd0758df1ac27499b5abaa1c4b0d762f8184c /cpukit/score/cpu/i386/include/rtems/score/cpu.h | |
parent | bsp/pc386: Update context switch and restore (diff) | |
download | rtems-5d4a1edca037691da56e54d8c3dde5d0102534e6.tar.bz2 |
bsp/pc386: Define interrupt stack frame for smp
- Defines CPU_Interrupt_frame in cpu_impl.h
- Updates isq_asm.S to save/restore registers in matching order to
interrupt frame
Diffstat (limited to 'cpukit/score/cpu/i386/include/rtems/score/cpu.h')
-rw-r--r-- | cpukit/score/cpu/i386/include/rtems/score/cpu.h | 28 |
1 files changed, 15 insertions, 13 deletions
diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpu.h b/cpukit/score/cpu/i386/include/rtems/score/cpu.h index 7669c4a0cf..0145ff8db3 100644 --- a/cpukit/score/cpu/i386/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/i386/include/rtems/score/cpu.h @@ -264,25 +264,27 @@ typedef void (*cpuExcHandlerType) (CPU_Exception_frame*); extern cpuExcHandlerType _currentExcHandler; extern void rtems_exception_init_mngt(void); -#ifdef RTEMS_SMP - /* Throw compile-time error to indicate incomplete support */ - #error "i386 targets do not support SMP.\ - See: https://devel.rtems.org/ticket/3335" - - /* - * This size must match the size of the CPU_Interrupt_frame, which must be - * used in the SMP context switch code, which is incomplete at the moment. - */ - #define CPU_INTERRUPT_FRAME_SIZE 4 -#endif - /* * This port does not pass any frame info to the * interrupt handler. */ typedef struct { - uint32_t todo_replace_with_apt_registers; +/* allow for 16B alignment (worst case 12 Bytes more) and isr right after pushfl */ + uint32_t reserved[3]; +/* registers saved by _ISR_Handler */ + uint32_t isr_vector; + uint32_t ebx; + uint32_t ebp; + uint32_t esp; +/* registers saved by rtems_irq_prologue_##_vector */ + uint32_t edx; + uint32_t ecx; + uint32_t eax; +/* registers saved by CPU */ + uint32_t eip; + uint32_t cs; + uint32_t eflags; } CPU_Interrupt_frame; typedef enum { |