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authorJoel Sherrill <joel.sherrill@oarcorp.com>2014-10-08 15:09:50 -0500
committerJoel Sherrill <joel.sherrill@oarcorp.com>2014-10-09 10:11:58 -0500
commit13148495de771436a456240b3b006772470f77f6 (patch)
treeb4205d4601200a09425a236c7060d521dcfdad65 /cpukit/score/cpu/h8300
parent81074900dfbf08326d735bb37d78c2dc8e3e8d2b (diff)
downloadrtems-13148495de771436a456240b3b006772470f77f6.tar.bz2
h8300/rtems/score/cpu.h: Fix macros to avoid warnings
Diffstat (limited to 'cpukit/score/cpu/h8300')
-rw-r--r--cpukit/score/cpu/h8300/rtems/score/cpu.h23
1 files changed, 17 insertions, 6 deletions
diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h
index 81704459c7..334cfbd778 100644
--- a/cpukit/score/cpu/h8300/rtems/score/cpu.h
+++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h
@@ -637,7 +637,7 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
*
* H8300 Specific Information:
*
- * XXX
+ * TODO: As of 8 October 2014, this method is not implemented for the SX.
*/
#if defined(__H8300H__) || defined(__H8300S__)
@@ -649,7 +649,10 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
(_isr_cookie) = __ccr; \
} while (0)
#else
-#define _CPU_ISR_Disable( _isr_cookie ) (_isr_cookie) = 0
+#define _CPU_ISR_Disable( _isr_cookie ) \
+ do { \
+ (_isr_cookie) = 0; \
+ } while (0)
#endif
@@ -660,7 +663,7 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
*
* H8300 Specific Information:
*
- * XXX
+ * TODO: As of 8 October 2014, this method is not implemented for the SX.
*/
#if defined(__H8300H__) || defined(__H8300S__)
@@ -670,7 +673,10 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
__asm__ volatile( "ldc %0, ccr" : : "m" (__ccr) ); \
} while (0)
#else
-#define _CPU_ISR_Enable( _isr_cookie )
+#define _CPU_ISR_Enable( _isr_cookie ) \
+ do { \
+ (_isr_cookie) = (_isr_cookie); \
+ } while (0)
#endif
/*
@@ -681,7 +687,7 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
*
* H8300 Specific Information:
*
- * XXX
+ * TODO: As of 8 October 2014, this method is not implemented for the SX.
*/
#if defined(__H8300H__) || defined(__H8300S__)
@@ -691,7 +697,11 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
__asm__ volatile( "ldc %0, ccr ; orc #0x80,ccr " : : "m" (__ccr) ); \
} while (0)
#else
-#define _CPU_ISR_Flash( _isr_cookie )
+#define _CPU_ISR_Flash( _isr_cookie ) \
+ do { \
+ _CPU_ISR_Enable( _isr_cookie ); \
+ _CPU_ISR_Disable( _isr_cookie ); \
+ } while (0)
#endif
#endif /* end of old gcc */
@@ -764,6 +774,7 @@ uint32_t _CPU_ISR_Get_level( void );
if ( (_isr) ) (_the_context)->ccr = CPU_CCR_INTERRUPTS_OFF; \
else (_the_context)->ccr = CPU_CCR_INTERRUPTS_ON; \
\
+ (void) _is_fp; /* to eliminate set but not used warning */ \
_stack = ((uintptr_t)(_stack_base)) + (_size) - 4; \
*((proc_ptr *)(_stack)) = (_entry_point); \
(_the_context)->er7 = (void *) _stack; \