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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-05-27 12:01:59 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-05-27 12:01:59 +0000 |
| commit | c7935a4a2aee45bbb642b1e846f85c38617d9b69 (patch) | |
| tree | 7151568ca55f0bba7069274a7f2df06fbd9ebf85 /cpukit/score/cpu/bfin/rtems/score/cpu.h | |
| parent | PR added. (diff) | |
| download | rtems-c7935a4a2aee45bbb642b1e846f85c38617d9b69.tar.bz2 | |
2009-05-25 Allan Hessenflow <allanh@kallisti.com>
PR 1418/cpukit
* rtems/score/cpu.h: corrected _CPU_ISR_Flash implementation, added
core synchronization after all cli/sti.
Diffstat (limited to 'cpukit/score/cpu/bfin/rtems/score/cpu.h')
| -rw-r--r-- | cpukit/score/cpu/bfin/rtems/score/cpu.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h index e128b03704..3f9df06b16 100644 --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h @@ -727,7 +727,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; */ #define _CPU_ISR_Disable( _level ) \ { \ - asm volatile ("cli %0 \n" : "=d" (_level) ); \ + asm volatile ("cli %0; csync \n" : "=d" (_level) ); \ } @@ -744,7 +744,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * XXX document implementation including references if appropriate */ #define _CPU_ISR_Enable( _level ) { \ - __asm__ __volatile__ ("sti %0 \n" : : "d" (_level) ); \ + __asm__ __volatile__ ("sti %0; csync \n" : : "d" (_level) ); \ } /** @@ -761,8 +761,8 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * XXX document implementation including references if appropriate */ #define _CPU_ISR_Flash( _level ) { \ - __asm__ __volatile__ ("sti %0; ssync; sti %1" \ - : : "d"(0xffff), "d"(_level)); \ + __asm__ __volatile__ ("sti %0; csync; cli r0; csync" \ + : : "d"(_level) : "R0" ); \ } /** @@ -784,7 +784,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; */ #define _CPU_ISR_Set_level( _new_level ) \ { \ - __asm__ __volatile__ ( "sti %0" : : "d"(_new_level ? 0 : 0xffff) ); \ + __asm__ __volatile__ ( "sti %0; csync" : : "d"(_new_level ? 0 : 0xffff) ); \ } |