Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

1 files changed, 88 insertions, 0 deletions

diff --git a/cpukit/score/cpu/bfin/include/rtems/bfin/bfin.h b/cpukit/score/cpu/bfin/include/rtems/bfin/bfin.h
new file mode 100644
index 0000000000..4ba0b2b295
--- /dev/null
+++ b/cpukit/score/cpu/bfin/include/rtems/bfin/bfin.h
@@ -0,0 +1,88 @@
+/**
+ * @file
+ *
+ * @brief Macros for MMR register common to all Blackfin Processors
+ *
+ * This file defines Macros for MMR register common to all Blackfin
+ * Processors.
+ */
+
+/*
+ *  COPYRIGHT (c) 2006 by Atos Automacao Industrial Ltda.
+ *             modified by Alain Schaefer <alain.schaefer@easc.ch>
+ *                     and Antonio Giovanini <antonio@atos.com.br>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ */
+
+#ifndef _RTEMS_BFIN_BFIN_H
+#define _RTEMS_BFIN_BFIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Scratchpad SRAM */
+
+#define SCRATCH                0xFFB00000
+#define SCRATCH_SIZE           0x1000
+#define SCRATCH_TOP            0xFFB00ffc
+
+
+/* System Interrupt Controller Chapter 4*/
+#define SIC_RVECT              0xFFC00108
+#define SIC_IMASK              0xFFC0010C
+#define SIC_IAR0               0xFFC00110
+#define SIC_IAR1               0xFFC00114
+#define SIC_IAR2               0xFFC00118
+#define SIC_ISR                0xFFC00120
+#define SIC_IWR                0xFFC00124
+
+/* Event Vector Table        Chapter 4 */
+
+#define EVT0                   0xFFE02000
+#define EVT1                   0xFFE02004
+#define EVT2                   0xFFE02008
+#define EVT3                   0xFFE0200C
+#define EVT4                   0xFFE02010
+#define EVT5                   0xFFE02014
+#define EVT6                   0xFFE02018
+#define EVT7                   0xFFE0201C
+#define EVT8                   0xFFE02020
+#define EVT9                   0xFFE02024
+#define EVT10                  0xFFE02028
+#define EVT11                  0xFFE0202C
+#define EVT12                  0xFFE02030
+#define EVT13                  0xFFE02034
+#define EVT14                  0xFFE02038
+#define EVT15                  0xFFE0203C
+#define IMASK                  0xFFE02104
+#define IPEND                  0xFFE02108
+#define ILAT                   0xFFE0210C
+#define IPRIO                  0xFFE02110
+
+
+#define TCNTL                  0xFFE03000
+#define TPERIOD                0xFFE03004
+#define TSCALE                 0xFFE03008
+#define TCOUNT                 0xFFE0300C
+
+/* Masks for Timer Control */
+#define TMPWR                  0x00000001
+#define TMREN                  0x00000002
+#define TAUTORLD               0x00000004
+#define TINT                   0x00000008
+
+/* Event Bit Positions */
+#define EVT_IVTMR_P            0x00000006
+
+#define EVT_IVTMR              (1 << EVT_IVTMR_P)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTEMS_SCORE_BFIN_H */