2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>

	* rtems/include/rtems/rtems/ratemon.h,
	rtems/include/rtems/rtems/status.h,
	score/include/rtems/score/coremutex.h,
	score/include/rtems/score/object.h: Removed extraneous commas.

1 files changed, 46 insertions, 15 deletions

diff --git a/cpukit/score/cpu/bfin/cpu.c b/cpukit/score/cpu/bfin/cpu.c
index 9c7184ab11..607b699ef0 100644
--- a/cpukit/score/cpu/bfin/cpu.c
+++ b/cpukit/score/cpu/bfin/cpu.c
@@ -30,6 +30,13 @@
  */
 
 
+extern void _ISR15_Handler(void);
+extern void _CPU_Emulation_handler(void);
+extern void _CPU_Reset_handler(void);
+extern void _CPU_NMI_handler(void);
+extern void _CPU_Exception_handler(void);
+extern void _CPU_Unhandled_Interrupt_handler(void);
+
 void _CPU_Initialize(
   void      (*thread_dispatch)      /* ignored on this CPU */
 )
@@ -45,7 +52,7 @@ void _CPU_Initialize(
    *  dependent variable.
    */
 
-  _CPU_Thread_dispatch_pointer = thread_dispatch;
+  /*_CPU_Thread_dispatch_pointer = thread_dispatch;*/
 
   /*
    *  If there is not an easy way to initialize the FP context
@@ -55,8 +62,31 @@ void _CPU_Initialize(
    */
 
   /* FP context initialization support goes here */
+
+
+
+  proc_ptr ignored;
+
+#if 0
+  /* occassionally useful debug stuff */
+  int i;
+  _CPU_ISR_install_raw_handler(0, _CPU_Emulation_handler, &ignored);
+  _CPU_ISR_install_raw_handler(1, _CPU_Reset_handler, &ignored);
+  _CPU_ISR_install_raw_handler(2, _CPU_NMI_handler, &ignored);
+  _CPU_ISR_install_raw_handler(3, _CPU_Exception_handler, &ignored);
+  for (i = 5; i < 15; i++)
+    _CPU_ISR_install_raw_handler(i, _CPU_Unhandled_Interrupt_handler, &ignored);
+#endif
+
+  /* install handler that will be used to call _Thread_Dispatch */
+  _CPU_ISR_install_raw_handler( 15, _ISR15_Handler, &ignored );
+  /* enable self nesting */
+  __asm__ __volatile__ ("syscfg = %0" : : "d" (0x00000004));
 }
 
+
+
+
 /*PAGE
  *
  *  _CPU_ISR_Get_level
@@ -78,7 +108,7 @@ uint32_t   _CPU_ISR_Get_level( void )
 
     _tmpimask = *((uint32_t*)IMASK);
 
-    return _tmpimask;
+    return (_tmpimask & 0xffe0) ? 0 : 1;
 }
 
 /*PAGE
@@ -136,15 +166,9 @@ void _CPU_ISR_install_vector(
   proc_ptr   *old_handler
 )
 {
-   *old_handler = _ISR_Vector_table[ vector ];
+   proc_ptr ignored;
 
-   /*
-    *  If the interrupt vector table is a table of pointer to isr entry
-    *  points, then we need to install the appropriate RTEMS interrupt
-    *  handler for this vector number.
-    */
-
-   _CPU_ISR_install_raw_handler( vector, _ISR_Handler, old_handler );
+   *old_handler = _ISR_Vector_table[ vector ];
 
    /*
     *  We put the actual user ISR address in '_ISR_vector_table'.  This will
@@ -152,8 +176,19 @@ void _CPU_ISR_install_vector(
     */
 
     _ISR_Vector_table[ vector ] = new_handler;
+
+    _CPU_ISR_install_raw_handler( vector, _ISR_Handler, &ignored );
 }
 
+#if (CPU_PROVIDES_IDLE_THREAD_BODY == TRUE)
+void *_CPU_Thread_Idle_body(uint32_t ignored) {
+
+    while (1) {
+        __asm__ __volatile__("ssync; idle; ssync");
+    }
+}
+#endif
+
 /*
  * Copied from the arm port.
  */
@@ -170,12 +205,8 @@ void _CPU_Context_Initialize(
     stack_high = ((uint32_t  )(stack_base) + size);
 
     the_context->register_sp = stack_high;
-    // gcc/config/bfin/bfin.h defines CPU_MINIMUM_STACK_FRAME_SIZE = 0 thus we do sp=fp
-    // is this correct ?????
-    the_context->register_fp = stack_high;
     the_context->register_rets = (uint32_t) entry_point;
-
-    //mask the interrupt level
+    the_context->imask = new_level ? 0 : 0xffff;
 }