summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/avr/cpu.c
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@OARcorp.com>2009-07-06 15:36:23 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2009-07-06 15:36:23 +0000
commit7c46cf58b3d774bf417d84bb55abb0c3360a7f1e (patch)
tree6c7964917751b010e2b3e586e78f98387596d8b9 /cpukit/score/cpu/avr/cpu.c
parent2009-07-03 Josh Switnicki <josh.switnicki@utoronto.ca> (diff)
downloadrtems-7c46cf58b3d774bf417d84bb55abb0c3360a7f1e.tar.bz2
2009-07-03 Josh Switnicki <josh.switnicki@utoronto.ca>
* cpu.c: Implemented _CPU_Context_Initialize as a C function instead of a macro. It works with limited functionality. Implemented _CPU_Thread_Idle_body to use sleep instruction. * Makefile.am: Changed cpu_asm.c -> cpu_asm.S * cpu_asm.S: renamed from cpu_asm.c and implemented functions is asm * rtems/asm.h: Appended "macros.inc" to the end of "asm.h" * rtems/score/cpu.h: + Included "avr/io.h". + Added use 16 bit object definition. + Modified Context_Control struct to relect the registers that need to be saved. + Implemented _CPU_ISR_Disable, _CPU_ISR_Enable, and _CPU_ISR_Flash. Added function definitions for _CPU_Context_Initialize and _CPU_Push.
Diffstat (limited to 'cpukit/score/cpu/avr/cpu.c')
-rw-r--r--cpukit/score/cpu/avr/cpu.c40
1 files changed, 38 insertions, 2 deletions
diff --git a/cpukit/score/cpu/avr/cpu.c b/cpukit/score/cpu/avr/cpu.c
index 1f40f8cfbe..b966da8e2b 100644
--- a/cpukit/score/cpu/avr/cpu.c
+++ b/cpukit/score/cpu/avr/cpu.c
@@ -44,6 +44,42 @@ void _CPU_Initialize(void)
/*PAGE
*
+ * _CPU_Context_Initialize
+ *
+ * This kernel routine initializes the basic non-FP context area associated
+ * with each thread.
+ *
+ * Input parameters:
+ * the_context - pointer to the context area
+ * stack_base - address of memory for the SPARC
+ * size - size in bytes of the stack area
+ * new_level - interrupt level for this context area
+ * entry_point - the starting execution point for this this context
+ * is_fp - TRUE if this context is associated with an FP thread
+ *
+ * Output parameters: NONE
+ */
+
+void _CPU_Context_Initialize(
+ Context_Control *the_context,
+ uint32_t *stack_base,
+ uint32_t size,
+ uint32_t new_level,
+ void *entry_point,
+ bool is_fp
+)
+{
+ uint16_t _stack; //declare helper variable
+ _stack = (uint16_t) (stack_base) + (uint16_t) (size); //calc stack pointer
+ the_context->stack_pointer = _stack - 2; //save stack pointer (- 2 bytes)
+ _CPU_Push(_stack, (uint16_t)(entry_point)); //push entry point onto context stack
+ the_context->status = 0; //init status to zero
+ if (new_level == TRUE) _CPU_ISR_Enable( 0 );
+}
+
+
+/*PAGE
+ *
* _CPU_ISR_Get_level
*
* NO_CPU Specific Information:
@@ -120,7 +156,7 @@ void _CPU_ISR_install_vector(
/*
* We put the actual user ISR address in '_ISR_vector_table'. This will
* be used by the _ISR_Handler so the user gets control.
- */
+ */
_ISR_Vector_table[ vector ] = new_handler;
}
@@ -162,7 +198,7 @@ void _CPU_Install_interrupt_stack( void )
void *_CPU_Thread_Idle_body( uintptr_t ignored )
{
- for( ; ; )
+ for( ; ; ) asm volatile ("sleep"::);
/* insert your "halt" instruction here */ ;
return (void *) 0;
}