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authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-14 09:53:57 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-18 07:30:35 +0100
commitd59585db26ea30d23a0d112212cf4b42d01e73fc (patch)
tree9cf0b9d4759cbdffce87da9892110415d27d4503 /cpukit/score/cpu/arm/rtems
parentarm: Simplify _ARMV4_Exception_interrupt (diff)
downloadrtems-d59585db26ea30d23a0d112212cf4b42d01e73fc.tar.bz2
arm: Use Per_CPU_Control::isr_dispatch_disable
Update #2751.
Diffstat (limited to 'cpukit/score/cpu/arm/rtems')
-rw-r--r--cpukit/score/cpu/arm/rtems/score/cpu.h17
1 files changed, 14 insertions, 3 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 326abbb662..b1fabafb59 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -8,7 +8,7 @@
* This include file contains information pertaining to the ARM
* processor.
*
- * Copyright (c) 2009-2015 embedded brains GmbH.
+ * Copyright (c) 2009, 2016 embedded brains GmbH
*
* Copyright (c) 2007 Ray Xu <Rayx.cn@gmail.com>
*
@@ -209,11 +209,19 @@
#define ARM_CONTEXT_CONTROL_D8_OFFSET 48
#endif
+#ifdef ARM_MULTILIB_ARCH_V4
+ #ifdef ARM_MULTILIB_VFP
+ #define ARM_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE 112
+ #else
+ #define ARM_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE 48
+ #endif
+#endif
+
#ifdef RTEMS_SMP
#ifdef ARM_MULTILIB_VFP
- #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 112
+ #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 116
#else
- #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 48
+ #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 52
#endif
#endif
@@ -277,6 +285,9 @@ typedef struct {
uint64_t register_d14;
uint64_t register_d15;
#endif
+#ifdef ARM_MULTILIB_ARCH_V4
+ uint32_t isr_dispatch_disable;
+#endif
#ifdef RTEMS_SMP
volatile bool is_executing;
#endif