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authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-10 12:02:28 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-23 12:52:06 +0100
commit84e6f15c828869eb7d293096cfcfa0563b5752b3 (patch)
treeefafb1ab17f6d1a612f79b6ec8d821ad9123756c /cpukit/score/cpu/arm/rtems
parentsmptests/smplock01: Test TAS and TTAS locks (diff)
downloadrtems-84e6f15c828869eb7d293096cfcfa0563b5752b3.tar.bz2
score: Robust thread dispatch
On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811.
Diffstat (limited to 'cpukit/score/cpu/arm/rtems')
-rw-r--r--cpukit/score/cpu/arm/rtems/score/cpu.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index df3034134c..df946798f7 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -130,6 +130,12 @@
#define CPU_USE_DEFERRED_FP_SWITCH FALSE
+#if defined(ARM_MULTILIB_ARCH_V7M)
+ #define CPU_ENABLE_ROBUST_THREAD_DISPATCH TRUE
+#else
+ #define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE
+#endif
+
#if defined(ARM_MULTILIB_HAS_WFI)
#define CPU_PROVIDES_IDLE_THREAD_BODY TRUE
#else