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| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2003-03-04 06:55:35 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2003-03-04 06:55:35 +0000 |
| commit | 5372f167a971764ea518fcaee5b0559e73d5b0a6 (patch) | |
| tree | 16bffeca054ae16194aa238b5945a90e3f16801c /cpukit/score/cpu/arm/rtems | |
| parent | 2003-02-28 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-5372f167a971764ea518fcaee5b0559e73d5b0a6.tar.bz2 | |
Merger from rtems-4-6-branch.
Diffstat (limited to 'cpukit/score/cpu/arm/rtems')
| -rw-r--r-- | cpukit/score/cpu/arm/rtems/score/arm.h | 6 | ||||
| -rw-r--r-- | cpukit/score/cpu/arm/rtems/score/cpu.h | 14 |
2 files changed, 11 insertions, 9 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/arm.h b/cpukit/score/cpu/arm/rtems/score/arm.h index f32556bf64..b01d862e3d 100644 --- a/cpukit/score/cpu/arm/rtems/score/arm.h +++ b/cpukit/score/cpu/arm/rtems/score/arm.h @@ -32,32 +32,26 @@ extern "C" { #if defined(__ARM_ARCH_4__) # define CPU_MODEL_NAME "ARMv4" # define ARM_HAS_CLZ 0 -# define ARM_HAS_THUMB 0 #elif defined(__ARM_ARCH_4T__) # define CPU_MODEL_NAME "ARMv4T" # define ARM_HAS_CLZ 0 -# define ARM_HAS_THUMB 1 #elif defined(__ARM_ARCH_5__) # define CPU_MODEL_NAME "ARMv5" # define ARM_HAS_CLZ 1 -# define ARM_HAS_THUMB 0 #elif defined(__ARM_ARCH_5T__) # define CPU_MODEL_NAME "ARMv5T" # define ARM_HAS_CLZ 1 -# define ARM_HAS_THUMB 1 #elif defined(__ARM_ARCH_5E__) # define CPU_MODEL_NAME "ARMv5E" # define ARM_HAS_CLZ 1 -# define ARM_HAS_THUMB 0 #elif defined(__ARM_ARCH_5TE__) # define CPU_MODEL_NAME "ARMv5TE" # define ARM_HAS_CLZ 1 -# define ARM_HAS_THUMB 1 #else # error "Unsupported CPU Model" diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h index 6d462a6bf5..6dd32eb0fc 100644 --- a/cpukit/score/cpu/arm/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h @@ -278,9 +278,17 @@ extern "C" { */ #define CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES FALSE -#define CPU_BIG_ENDIAN FALSE -#define CPU_LITTLE_ENDIAN TRUE +#if defined(__ARMEL__) +#define CPU_BIG_ENDIAN FALSE +#define CPU_LITTLE_ENDIAN TRUE +#elif define(__ARMEB__) +#define CPU_BIG_ENDIAN TRUE +#define CPU_LITTLE_ENDIAN FALSE +#else +#error "Unknown endianness" +#endif + /* * The following defines the number of bits actually used in the * interrupt field of the task mode. How those bits map to the @@ -774,7 +782,7 @@ void _CPU_Context_Initialize( # define _CPU_Priority_bits_index( _priority ) \ (_priority) -# error "Implement CLZ verson of priority bit functions for ARMv5" +# error "Implement CLZ version of priority bit functions for ARMv5" #endif /* end of Priority handler macros */ |