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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-21 11:40:00 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-21 13:15:35 +0100 |
| commit | 4e2bc0a308104d96b60d8af1a0c5bcff99fe1564 (patch) | |
| tree | a37d03f00ab5432c87f9438919b278af5459e7f6 /cpukit/score/cpu/arm/rtems | |
| parent | powerpc/mpc5xx: Rename CPU_Interrupt_frame (diff) | |
| download | rtems-4e2bc0a308104d96b60d8af1a0c5bcff99fe1564.tar.bz2 | |
arm: Fix Thumb-1 targets
We cannot use the MRS or MSR instructions in Thumb-1 mode. Stay in ARM
mode for the Thumb-1 targets during interrupt low-level processing.
Update #2751.
Diffstat (limited to 'cpukit/score/cpu/arm/rtems')
| -rw-r--r-- | cpukit/score/cpu/arm/rtems/asm.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/rtems/asm.h b/cpukit/score/cpu/arm/rtems/asm.h index ec5ddc94ac..f72df32325 100644 --- a/cpukit/score/cpu/arm/rtems/asm.h +++ b/cpukit/score/cpu/arm/rtems/asm.h @@ -187,6 +187,36 @@ #endif /* __thumb__ */ .endm +.macro SWITCH_FROM_THUMB_2_TO_ARM +#ifdef __thumb2__ +.align 2 + bx pc +.arm +#endif /* __thumb__ */ +.endm + +.macro SWITCH_FROM_ARM_TO_THUMB_2 REG +#ifdef __thumb2__ + add \REG, pc, #1 + bx \REG +.thumb +#endif /* __thumb__ */ +.endm + +.macro BLX_TO_THUMB_1 TARGET +#if defined(__thumb__) && !defined(__thumb2__) + add lr, pc, #1 + bx lr +.thumb + bl \TARGET +.align 2 + bx pc +.arm +#else + bl \TARGET +#endif +.endm + .macro GET_SELF_CPU_CONTROL REG #ifdef RTEMS_SMP /* Use PL1 only Thread ID Register (TPIDRPRW) */ |