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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-01-04 14:09:19 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-01-07 15:07:40 +0100
commit8d68773761b2f4a3f2d7102a6af01d61db33efec (patch)
treeaf61a4703afd3257ab58dd4cb00830289707f8bb /cpukit/score/cpu/arm/rtems/score/cpu.h
parentarm: Rename type and functions (diff)
downloadrtems-8d68773761b2f4a3f2d7102a6af01d61db33efec.tar.bz2
arm: Change CPU_Exception_frame
Provide proper CPU_Exception_frame definition for ARMv4 and use it. Remove arm_cpu_context.
Diffstat (limited to 'cpukit/score/cpu/arm/rtems/score/cpu.h')
-rw-r--r--cpukit/score/cpu/arm/rtems/score/cpu.h38
1 files changed, 15 insertions, 23 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 82bad386c9..f83b30f229 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -490,26 +490,6 @@ static inline uint16_t CPU_swap_u16( uint16_t value )
* @{
*/
-typedef struct {
- uint32_t r0;
- uint32_t r1;
- uint32_t r2;
- uint32_t r3;
- uint32_t r4;
- uint32_t r5;
- uint32_t r6;
- uint32_t r7;
- uint32_t r8;
- uint32_t r9;
- uint32_t r10;
- uint32_t r11;
- uint32_t r12;
- uint32_t sp;
- uint32_t lr;
- uint32_t pc;
- uint32_t cpsr;
-} arm_cpu_context;
-
typedef enum {
ARM_EXCEPTION_RESET = 0,
ARM_EXCEPTION_UNDEF = 1,
@@ -519,7 +499,8 @@ typedef enum {
ARM_EXCEPTION_RESERVED = 5,
ARM_EXCEPTION_IRQ = 6,
ARM_EXCEPTION_FIQ = 7,
- MAX_EXCEPTIONS = 8
+ MAX_EXCEPTIONS = 8,
+ ARM_EXCEPTION_MAKE_ENUM_32_BIT = 0xffffffff
} Arm_symbolic_exception_name;
static inline uint32_t arm_status_irq_enable( void )
@@ -558,14 +539,25 @@ static inline void arm_status_restore( uint32_t psr )
/** @} */
-/* XXX This is out of date */
typedef struct {
uint32_t register_r0;
uint32_t register_r1;
uint32_t register_r2;
uint32_t register_r3;
- uint32_t register_ip;
+ uint32_t register_r4;
+ uint32_t register_r5;
+ uint32_t register_r6;
+ uint32_t register_r7;
+ uint32_t register_r8;
+ uint32_t register_r9;
+ uint32_t register_r10;
+ uint32_t register_r11;
+ uint32_t register_r12;
+ uint32_t register_sp;
uint32_t register_lr;
+ uint32_t register_pc;
+ uint32_t register_cpsr;
+ Arm_symbolic_exception_name vector;
} CPU_Exception_frame;
typedef CPU_Exception_frame CPU_Interrupt_frame;