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authorChris Johns <chrisj@rtems.org>2017-12-23 18:18:56 +1100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-01-25 08:45:26 +0100
commit2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree44759efe9374f13200a97e96d91bd9a2b7e5ce2a /cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
parentMAINTAINERS: Add myself to Write After Approval. (diff)
downloadrtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
Diffstat (limited to 'cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h')
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h111
1 files changed, 111 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
new file mode 100644
index 0000000000..0885c2ef39
--- /dev/null
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
@@ -0,0 +1,111 @@
+/**
+ * @file
+ *
+ * @brief CPU Port Implementation API
+ */
+
+/*
+ * Copyright (c) 2013, 2016 embedded brains GmbH
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _RTEMS_SCORE_CPUIMPL_H
+#define _RTEMS_SCORE_CPUIMPL_H
+
+#include <rtems/score/cpu.h>
+
+#define CPU_PER_CPU_CONTROL_SIZE 0
+
+#ifdef ARM_MULTILIB_ARCH_V4
+
+#if defined(ARM_MULTILIB_VFP_D32)
+#define CPU_INTERRUPT_FRAME_SIZE 240
+#elif defined(ARM_MULTILIB_VFP)
+#define CPU_INTERRUPT_FRAME_SIZE 112
+#else
+#define CPU_INTERRUPT_FRAME_SIZE 40
+#endif
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef ARM_MULTILIB_ARCH_V4
+
+typedef struct {
+#ifdef ARM_MULTILIB_VFP
+ uint32_t fpscr;
+#ifdef ARM_MULTILIB_VFP_D32
+ double d16;
+ double d17;
+ double d18;
+ double d19;
+ double d20;
+ double d21;
+ double d22;
+ double d23;
+ double d24;
+ double d25;
+ double d26;
+ double d27;
+ double d28;
+ double d29;
+ double d30;
+ double d31;
+#endif /* ARM_MULTILIB_VFP_D32 */
+ double d0;
+ double d1;
+ double d2;
+ double d3;
+ double d4;
+ double d5;
+ double d6;
+ double d7;
+#endif /* ARM_MULTILIB_VFP */
+ uint32_t r9;
+ uint32_t lr;
+ uint32_t r0;
+ uint32_t r1;
+ uint32_t r2;
+ uint32_t r3;
+ uint32_t return_pc;
+ uint32_t return_cpsr;
+ uint32_t r7;
+ uint32_t r12;
+} CPU_Interrupt_frame;
+
+#ifdef RTEMS_SMP
+
+static inline struct Per_CPU_Control *_ARM_Get_current_per_CPU_control( void )
+{
+ struct Per_CPU_Control *cpu_self;
+
+ /* Use PL1 only Thread ID Register (TPIDRPRW) */
+ __asm__ volatile (
+ "mrc p15, 0, %0, c13, c0, 4"
+ : "=r" ( cpu_self )
+ );
+
+ return cpu_self;
+}
+
+#define _CPU_Get_current_per_CPU_control() _ARM_Get_current_per_CPU_control()
+
+#endif /* RTEMS_SMP */
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ASM */
+
+#endif /* _RTEMS_SCORE_CPUIMPL_H */