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authorSebastian Huber <sebastian.huber@embedded-brains.de>2022-01-13 14:51:55 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2022-01-17 08:14:12 +0100
commit12a2a8e4426c05161aa76a9c86de1e36e43e8a61 (patch)
tree2fc95f72415a243cc05aa7aae73586ea18f0cd3d /cpukit/score/cpu/arm/include/rtems/score/arm.h
parentarm: Fix stack alignment during interrupt handling (diff)
downloadrtems-12a2a8e4426c05161aa76a9c86de1e36e43e8a61.tar.bz2
arm: Optimize interrupt handling
Use the SRS (Store Return State) instruction if available. This considerably simplifies the context save and restore.
Diffstat (limited to 'cpukit/score/cpu/arm/include/rtems/score/arm.h')
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/arm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/include/rtems/score/arm.h b/cpukit/score/cpu/arm/include/rtems/score/arm.h
index b1e4b07a37..7eaa69d889 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/arm.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/arm.h
@@ -47,6 +47,7 @@ extern "C" {
#define ARM_MULTILIB_HAS_WFI
#define ARM_MULTILIB_HAS_LOAD_STORE_EXCLUSIVE
#define ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
+ #define ARM_MULTILIB_HAS_STORE_RETURN_STATE
#endif
#ifndef ARM_DISABLE_THREAD_ID_REGISTER_USE