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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-08-05 10:16:31 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-08-05 13:45:37 +0200 |
| commit | 007bdc4f5953ddd36f166a2d4e69352d778384ed (patch) | |
| tree | 9d9156e77d660cff0bf5a2dc95246b15464fdf64 /cpukit/score/cpu/arm/cpu.c | |
| parent | sptests/sp37: Add ISR set/get level tests (diff) | |
| download | rtems-007bdc4f5953ddd36f166a2d4e69352d778384ed.tar.bz2 | |
arm: Fix CPU_MODES_INTERRUPT_MASK
The set of interrupt levels must be a continuous range of non-negative
integers starting at zero.
Diffstat (limited to 'cpukit/score/cpu/arm/cpu.c')
| -rw-r--r-- | cpukit/score/cpu/arm/cpu.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index 958bd813b4..70021365ad 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -87,10 +87,12 @@ void _CPU_ISR_Set_level( uint32_t level ) { uint32_t arm_switch_reg; + level = ( level != 0 ) ? ARM_PSR_I : 0; + __asm__ volatile ( ARM_SWITCH_TO_ARM "mrs %[arm_switch_reg], cpsr\n" - "bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n" + "bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( ARM_PSR_I ) "\n" "orr %[arm_switch_reg], %[level]\n" "msr cpsr, %0\n" ARM_SWITCH_BACK @@ -107,12 +109,12 @@ uint32_t _CPU_ISR_Get_level( void ) __asm__ volatile ( ARM_SWITCH_TO_ARM "mrs %[level], cpsr\n" - "and %[level], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n" + "and %[level], #" _CPU_ISR_LEVEL_STRINGOF( ARM_PSR_I ) "\n" ARM_SWITCH_BACK : [level] "=&r" (level) ARM_SWITCH_ADDITIONAL_OUTPUT ); - return level; + return ( level & ARM_PSR_I ) != 0; } void _CPU_ISR_install_vector( |