diff options
| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2020-12-07 14:51:10 -0600 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2020-12-10 11:37:50 -0600 |
| commit | f046af5804cdac0f6afa0f6e30447f17e8d73a6f (patch) | |
| tree | 280c81d1f967ce4599115154e1fd95695827148d /cpukit/score/cpu/aarch64/cpu_asm.S | |
| parent | bsps: Remove ARM GIC SGI target filter (diff) | |
| download | rtems-f046af5804cdac0f6afa0f6e30447f17e8d73a6f.tar.bz2 | |
cpukit/aarch64: Use hex consistently for offsets
Diffstat (limited to 'cpukit/score/cpu/aarch64/cpu_asm.S')
| -rw-r--r-- | cpukit/score/cpu/aarch64/cpu_asm.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/cpukit/score/cpu/aarch64/cpu_asm.S b/cpukit/score/cpu/aarch64/cpu_asm.S index 0e1b803610..6c4da04628 100644 --- a/cpukit/score/cpu/aarch64/cpu_asm.S +++ b/cpukit/score/cpu/aarch64/cpu_asm.S @@ -78,9 +78,9 @@ DEFINE_FUNCTION_AARCH64(_CPU_Context_switch) #ifdef AARCH64_MULTILIB_VFP add x5, x0, #AARCH64_CONTEXT_CONTROL_D8_OFFSET stp d8, d9, [x5] - stp d10, d11, [x5, #16] - stp d12, d13, [x5, #32] - stp d14, d15, [x5, #48] + stp d10, d11, [x5, #0x10] + stp d12, d13, [x5, #0x20] + stp d14, d15, [x5, #0x30] #endif str x3, [x0, #AARCH64_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE] @@ -102,9 +102,9 @@ DEFINE_FUNCTION_AARCH64(_CPU_Context_switch) #ifdef AARCH64_MULTILIB_VFP add x5, x1, #AARCH64_CONTEXT_CONTROL_D8_OFFSET ldp d8, d9, [x5] - ldp d10, d11, [x5, #16] - ldp d12, d13, [x5, #32] - ldp d14, d15, [x5, #48] + ldp d10, d11, [x5, #0x10] + ldp d12, d13, [x5, #0x20] + ldp d14, d15, [x5, #0x30] #endif msr TPIDR_EL0, x3 |