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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-03-08 16:56:49 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-03-09 21:11:10 +0100 |
commit | 32f0f11a68d3aa521f0398c9b8eec3d47f114c5e (patch) | |
tree | 672d1bd028d0e8c625dbe75db318050528f7c4b4 /cpukit/score/cpu/aarch64/cpu_asm.S | |
parent | bsp/altera-cyclone-v: fix the creation of reserved memory regions (diff) | |
download | rtems-32f0f11a68d3aa521f0398c9b8eec3d47f114c5e.tar.bz2 |
SMP: Fix start multitasking for some targets
The previous SMP multitasking start assumed that the initial heir thread of a
processor starts execution in _Thread_Handler(). The _Thread_Handler() sets
the interrupt state explicitly by _ISR_Set_level() before it calls the thread
entry. Under certain timing conditions, processors may perform an initial
context switch to a thread which already executes its thread body (see
smptests/smpstart01). In this case, interrupts are disabled after the context
switch on targets which do not save/restore the interrupt state during a
context switch (aarch64, arm, and riscv).
Close #4627.
Diffstat (limited to 'cpukit/score/cpu/aarch64/cpu_asm.S')
-rw-r--r-- | cpukit/score/cpu/aarch64/cpu_asm.S | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/cpukit/score/cpu/aarch64/cpu_asm.S b/cpukit/score/cpu/aarch64/cpu_asm.S index 2379698336..6321acde90 100644 --- a/cpukit/score/cpu/aarch64/cpu_asm.S +++ b/cpukit/score/cpu/aarch64/cpu_asm.S @@ -203,4 +203,21 @@ DEFINE_FUNCTION_AARCH64(_CPU_Context_restore) #endif b .L_check_is_executing + +DEFINE_FUNCTION_AARCH64(_AArch64_Start_multitasking) +#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32 + /* Sanitize input for ILP32 ABI */ + mov w0, w0 +#endif + + mov x1, x0 + GET_SELF_CPU_CONTROL reg_2 + + /* Switch the stack to the temporary interrupt stack of this processor */ + add sp, x2, #(PER_CPU_INTERRUPT_FRAME_AREA + CPU_INTERRUPT_FRAME_SIZE) + + /* Enable interrupts */ + msr DAIFClr, #0x2 + + b .L_check_is_executing #endif |