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authorDaniel Hellstrom <daniel@gaisler.com>2011-11-28 10:11:10 +0100
committerDaniel Hellstrom <daniel@gaisler.com>2015-04-17 01:10:15 +0200
commita31845f7f9b4770cf9ddd8b6820641d2f4f4c1da (patch)
tree0d7f215ec45d7c4cf6f1293af72ece2fbde1ddc3 /cpukit/libpci/pci_access.c
parentleon3,ngmp: simplify cpucounter initialization (diff)
downloadrtems-a31845f7f9b4770cf9ddd8b6820641d2f4f4c1da.tar.bz2
LIBPCI: added PCI layer to cpukit/libpci
Diffstat (limited to 'cpukit/libpci/pci_access.c')
-rw-r--r--cpukit/libpci/pci_access.c74
1 files changed, 74 insertions, 0 deletions
diff --git a/cpukit/libpci/pci_access.c b/cpukit/libpci/pci_access.c
new file mode 100644
index 0000000000..371c5ef24e
--- /dev/null
+++ b/cpukit/libpci/pci_access.c
@@ -0,0 +1,74 @@
+/* PCI Access Library
+ *
+ * COPYRIGHT (c) 2010.
+ * Cobham Gaisler AB.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <pci.h>
+#include <pci/access.h>
+
+/* Access Routines valid after a PCI-Access-Driver has registered */
+struct pci_access_drv pci_access_ops = {
+ .cfg = {.read8 = 0},
+};
+
+/* Read a 8-bit register over configuration space */
+int pci_cfg_r8(pci_dev_t dev, int ofs, uint8_t *data)
+{
+ return pci_access_ops.cfg.read8(dev, ofs, data);
+}
+
+/* Read a 16-bit register over configuration space */
+int pci_cfg_r16(pci_dev_t dev, int ofs, uint16_t *data)
+{
+ return pci_access_ops.cfg.read16(dev, ofs, data);
+}
+
+/* Read a 32-bit register over configuration space */
+int pci_cfg_r32(pci_dev_t dev, int ofs, uint32_t *data)
+{
+ return pci_access_ops.cfg.read32(dev, ofs, data);
+}
+
+/* Write a 8-bit register over configuration space */
+int pci_cfg_w8(pci_dev_t dev, int ofs, uint8_t data)
+{
+ return pci_access_ops.cfg.write8(dev, ofs, data);
+}
+
+/* Write a 16-bit register over configuration space */
+int pci_cfg_w16(pci_dev_t dev, int ofs, uint16_t data)
+{
+ return pci_access_ops.cfg.write16(dev, ofs, data);
+}
+
+/* Write a 32-bit register over configuration space */
+int pci_cfg_w32(pci_dev_t dev, int ofs, uint32_t data)
+{
+ return pci_access_ops.cfg.write32(dev, ofs, data);
+}
+
+void pci_modify_cmdsts(pci_dev_t dev, uint32_t mask, uint32_t val)
+{
+ uint32_t data;
+
+ pci_cfg_r32(dev, PCI_COMMAND, &data);
+ data &= ~mask;
+ data |= val;
+ pci_cfg_w32(dev, PCI_COMMAND, data);
+}
+
+/* Register a driver for handling access to PCI */
+int pci_access_drv_register(struct pci_access_drv *drv)
+{
+ if (pci_access_ops.cfg.read8)
+ return -1; /* Already registered a driver.. */
+
+ pci_access_ops = *drv;
+
+ return 0;
+}