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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-07-03 18:24:27 +0200 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-07-04 15:55:57 +0200 |
| commit | 2b885d6084e5cf9595afb218364e117287015a3b (patch) | |
| tree | 4fe84808b09770979b6e6ca9863af494a4945fda /cpukit/libdl | |
| parent | bsps/arm: Change code to explicit selection of cache implementation for ARM B... (diff) | |
| download | rtems-2b885d6084e5cf9595afb218364e117287015a3b.tar.bz2 | |
libdl/rtl-obj.c: ensure that loaded code is synchronized through caches.
Synchronize each cluster of sections of the same type separately
to support even cases where text and data are allocated from different
areas (for example due allocation from different MPU protection regions).
rtems_cache_instruction_sync_after_code_change is called even to data
sections. Propagation of data only changes should not require cache
maintenance operation on sane SMP mutithread capable systems if barrier
instruction is added but be on safe side even for case where self
modifying code uses data sections initial values etc.
Diffstat (limited to 'cpukit/libdl')
| -rw-r--r-- | cpukit/libdl/rtl-obj.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpukit/libdl/rtl-obj.c b/cpukit/libdl/rtl-obj.c index 5c89990466..00a1c6eb60 100644 --- a/cpukit/libdl/rtl-obj.c +++ b/cpukit/libdl/rtl-obj.c @@ -618,6 +618,8 @@ rtems_rtl_obj_sections_loader (uint32_t mask, first = false; } + rtems_cache_instruction_sync_after_code_change(base, base_offset); + node = rtems_chain_next (node); } |