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authorChris Johns <chrisj@rtems.org>2019-06-25 21:07:40 +1000
committerChris Johns <chrisj@rtems.org>2019-07-31 08:33:05 +1000
commitcb1e8497dff1b26c11fff6881eaf4fb93c39f151 (patch)
treec69db9cfe6fc338c24b23a5e2d63e7690b515429 /cpukit/libdebugger/rtems-debugger-threads.c
parentarm: Select the TLB invalidate based on the core's Id variant. (diff)
downloadrtems-cb1e8497dff1b26c11fff6881eaf4fb93c39f151.tar.bz2
libdebugger: ARM fixes for Cortex-A8 and ARM mode.
- Fix destorying the target and thread parts. - Fix the ARM backend to support Cortex-A8 and ARM mode code. - Use the DBGDSCR interrupt mask when single stepping. - Use the DBGDSCR method of entry to debug mode to filter the execptions. - Add support for BSPs to control the ARM backend.
Diffstat (limited to 'cpukit/libdebugger/rtems-debugger-threads.c')
-rw-r--r--cpukit/libdebugger/rtems-debugger-threads.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/cpukit/libdebugger/rtems-debugger-threads.c b/cpukit/libdebugger/rtems-debugger-threads.c
index 5ff249dc07..84a9faa453 100644
--- a/cpukit/libdebugger/rtems-debugger-threads.c
+++ b/cpukit/libdebugger/rtems-debugger-threads.c
@@ -362,6 +362,7 @@ rtems_debugger_thread_system_resume(bool detaching)
rtems_debugger_thread* thread = &current[i];
rtems_status_code sc;
int rr;
+ bool has_exception;
/*
* Check if resuming, which can be continuing, a step, or stepping a
* range.
@@ -380,11 +381,13 @@ rtems_debugger_thread_system_resume(bool detaching)
r = rr;
}
}
+ has_exception =
+ rtems_debugger_thread_flag(thread,
+ RTEMS_DEBUGGER_THREAD_FLAG_EXCEPTION);
if (rtems_debugger_verbose())
- rtems_debugger_printf("rtems-db: sys: : resume: 0x%08" PRIx32 "\n",
- thread->id);
- if (rtems_debugger_thread_flag(thread,
- RTEMS_DEBUGGER_THREAD_FLAG_EXCEPTION)) {
+ rtems_debugger_printf("rtems-db: sys: : resume: 0x%08" PRIx32 " %c\n",
+ thread->id, has_exception ? 'E' : ' ');
+ if (has_exception) {
rtems_debugger_target_exception_thread_resume(thread);
} else {
sc = rtems_task_resume(thread->id);