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authorChris Johns <chrisj@rtems.org>2017-12-23 18:18:56 +1100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-01-25 08:45:26 +0100
commit2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree44759efe9374f13200a97e96d91bd9a2b7e5ce2a /cpukit/include/pci/irq.h
parentMAINTAINERS: Add myself to Write After Approval. (diff)
downloadrtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
Diffstat (limited to 'cpukit/include/pci/irq.h')
-rw-r--r--cpukit/include/pci/irq.h118
1 files changed, 118 insertions, 0 deletions
diff --git a/cpukit/include/pci/irq.h b/cpukit/include/pci/irq.h
new file mode 100644
index 0000000000..7622201fd6
--- /dev/null
+++ b/cpukit/include/pci/irq.h
@@ -0,0 +1,118 @@
+/* PCI IRQ Library
+ *
+ * COPYRIGHT (c) 2010 Cobham Gaisler AB.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+/* IRQ handling does not have so much with PCI to do, this library depends
+ * on the BSP to implement shared interrupts.
+ */
+
+#ifndef __PCI_IRQ_H__
+#define __PCI_IRQ_H__
+
+#include <rtems/irq-extension.h>
+#include <rtems/score/basedefs.h>
+
+/*
+ * FIXME: This should be available via the IRQ extensions API.
+ *
+ * https://devel.rtems.org/ticket/3269
+ */
+void BSP_shared_interrupt_clear(int irq);
+void BSP_shared_interrupt_unmask(int irq);
+void BSP_shared_interrupt_mask(int irq);
+
+/* PCI Handler (ISR) called when IRQ is generated by any of the PCI devices
+ * connected to the same PCI IRQ Pin. This has been defined the same way as
+ * rtems_interrupt_handler in order for BSPs to "direct-map" the register
+ * and unregister functions rtems_interrupt_handler_install/remove
+ */
+typedef void (*pci_isr)(void *arg);
+
+/* Get assigned system IRQ to a PCI Device. If no IRQ 0 is returned */
+extern int pci_dev_irq(pci_dev_t dev);
+
+/* Register shared PCI IRQ handler, but does not enable it. The system interrupt
+ * number is read from the PCI board's PCI configuration space header iline
+ * field. The iline field is initialized by the PCI subsystem during start up,
+ * the ipin field is translated into a system IRQ and written to iline. The
+ * board's driver should use the iline field as the irq argument to this
+ * function.
+ *
+ * Arguments
+ * irq System IRQ number, normally taken from the PCI configuration area
+ * isr Function pointer to the ISR
+ * arg Second argument to function isr
+ */
+RTEMS_INLINE_ROUTINE int pci_interrupt_register(int irq, const char *info,
+ pci_isr isr, void *arg)
+{
+ return rtems_interrupt_handler_install(irq, info,
+ RTEMS_INTERRUPT_SHARED, isr,
+ arg);
+}
+
+/* Unregister previously registered shared PCI IRQ handler
+ *
+ * Arguments
+ * irq System IRQ number, normally taken from the PCI configuration area
+ * isr Function pointer to the ISR
+ * arg Second argument to function isr
+ */
+RTEMS_INLINE_ROUTINE int pci_interrupt_unregister(int irq, pci_isr isr,
+ void *arg)
+{
+ return rtems_interrupt_handler_remove(irq, isr, arg);
+}
+
+/* Enable shared PCI IRQ handler. This function will unmask the interrupt
+ * controller and mark this interrupt handler ready to handle interrupts. Note
+ * that since it is a shared interrupt handler service the interrupt may
+ * already be enabled, however no calls to this specific handler is made
+ * until it is enabled.
+ *
+ * Arguments
+ * irq System IRQ number, normally taken from the PCI configuration area
+ * isr Function pointer to the ISR
+ * arg Second argument to function isr
+ */
+RTEMS_INLINE_ROUTINE void pci_interrupt_unmask(int irq)
+{
+ BSP_shared_interrupt_unmask(irq);
+}
+
+/* Disable shared PCI IRQ handler. This function will mask the interrupt
+ * controller and mark this interrupt handler not ready to receive interrupts.
+ * Note that since it is a shared interrupt handler service the interrupt may
+ * still be enabled, however no calls to this specific handler is made
+ * while it is disabled.
+ *
+ * Arguments
+ * irq System IRQ number, normally taken from the PCI configuration area
+ * isr Function pointer to the ISR
+ * arg Second argument to function isr
+ */
+RTEMS_INLINE_ROUTINE void pci_interrupt_mask(int irq)
+{
+ BSP_shared_interrupt_mask(irq);
+}
+
+/* Acknowledge the interrupt controller by writing to the interrupt controller.
+ * Note that since it is a shared interrupt handler service, clearing the
+ * interrupt source may affect other ISRs registered to this IRQ.
+ *
+ * Arguments
+ * irq System IRQ number, normally taken from the PCI configuration area
+ * isr Function pointer to the ISR
+ * arg Second argument to function isr
+ */
+RTEMS_INLINE_ROUTINE void pci_interrupt_clear(int irq)
+{
+ BSP_shared_interrupt_clear(irq);
+}
+
+#endif /* !__PCI_IRQ_H__ */