diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-03-07 20:47:53 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-03-07 20:47:53 +0000 |
| commit | f0ad529d28688214568532c0d30eb13654db1462 (patch) | |
| tree | 0b254b2a26f754f598edf2b441c2ebd7576666ea /cpukit/ChangeLog | |
| parent | New. (diff) | |
| download | rtems-f0ad529d28688214568532c0d30eb13654db1462.tar.bz2 | |
2006-03-07 Joel Sherrill <joel@OARcorp.com>
PR 866/rtems
* score/include/rtems/system.h, score/include/rtems/score/isr.h,
score/inline/rtems/score/thread.inl,
score/macros/rtems/score/thread.inl: Added memory barriers to enter
and exit of dispatching and interrupt critical sections so GCC will
not optimize and reorder code out of a critical section.
Diffstat (limited to 'cpukit/ChangeLog')
| -rw-r--r-- | cpukit/ChangeLog | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/cpukit/ChangeLog b/cpukit/ChangeLog index 6b871c3776..66337501f9 100644 --- a/cpukit/ChangeLog +++ b/cpukit/ChangeLog @@ -1,3 +1,12 @@ +2006-03-07 Joel Sherrill <joel@OARcorp.com> + + PR 866/rtems + * score/include/rtems/system.h, score/include/rtems/score/isr.h, + score/inline/rtems/score/thread.inl, + score/macros/rtems/score/thread.inl: Added memory barriers to enter + and exit of dispatching and interrupt critical sections so GCC will + not optimize and reorder code out of a critical section. + 2006-02-08 Thomas Rauscher <trauscher@loytec.com> PR 890/networking |