diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-03-11 17:54:34 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-03-14 10:56:48 +0100 |
| commit | faad1926751ea8d26a3f7f9ed7f230b519118101 (patch) | |
| tree | 1dbd4688f08d0bc0e10180df5c1a65db01407034 /c | |
| parent | mpc83xx: Use shared linkcmds.base (diff) | |
| download | rtems-faad1926751ea8d26a3f7f9ed7f230b519118101.tar.bz2 | |
mpc83xx: Add and use mpc83xx_reset()
The inline version makes it possible to use this code in different
memory areas.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/startup/bspreset.c | 18 | ||||
| -rw-r--r-- | c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h | 19 |
2 files changed, 22 insertions, 15 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspreset.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspreset.c index fa4edf6f93..0aa71df71d 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspreset.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspreset.c @@ -14,21 +14,9 @@ #include <bsp.h> #include <bsp/bootcard.h> +#include <mpc83xx/mpc83xx.h> + void bsp_reset(void) { - _ISR_Set_level( 0 ); - - /* Set Reset Protection Register (RPR) to "RSTE" */ - mpc83xx.res.rpr = 0x52535445; - - /* - * Wait for Control Register Enabled in the - * Reset Control Enable Register (RCER). - */ - while (mpc83xx.res.rcer != 0x00000001) { - /* Wait */ - } - - /* Set Software Hard Reset in the Reset Control Register (RCR) */ - mpc83xx.res.rcr = 0x00000002; + mpc83xx_reset(); } diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h index 4fe6b251a1..6f7417af1c 100644 --- a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h +++ b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h @@ -820,6 +820,25 @@ typedef struct m83xxRegisters_ { extern m83xxRegisters_t mpc83xx; +static inline void mpc83xx_reset(void) +{ + _ISR_Set_level( 0 ); + + /* Set Reset Protection Register (RPR) to "RSTE" */ + mpc83xx.res.rpr = 0x52535445; + + /* + * Wait for Control Register Enabled in the + * Reset Control Enable Register (RCER). + */ + while (mpc83xx.res.rcer != 0x00000001) { + /* Wait */ + } + + /* Set Software Hard Reset in the Reset Control Register (RCR) */ + mpc83xx.res.rcr = 0x00000002; +} + #endif /* !defined ASM */ /* * some definitions used in assembler startup |