diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2011-06-28 20:29:33 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2011-06-28 20:29:33 +0000 |
| commit | e460716743637b755c80c530013950ae577084dc (patch) | |
| tree | e471619a2ec06190cb6042d084aaf8107fa2bf5c /c | |
| parent | 2011-06-28 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
| download | rtems-e460716743637b755c80c530013950ae577084dc.tar.bz2 | |
2011-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
Jennifer Averett <jennifer.averett@OARcorp.com>
PR 1801/bsps
* shared/start.S: Add SMP support to LEON3 BSP.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/sparc/ChangeLog | 6 | ||||
| -rw-r--r-- | c/src/lib/libbsp/sparc/shared/start.S | 42 |
2 files changed, 43 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/sparc/ChangeLog b/c/src/lib/libbsp/sparc/ChangeLog index 94a7320af5..261cf7a36a 100644 --- a/c/src/lib/libbsp/sparc/ChangeLog +++ b/c/src/lib/libbsp/sparc/ChangeLog @@ -1,3 +1,9 @@ +2011-06-28 Joel Sherrill <joel.sherrill@oarcorp.com> + Jennifer Averett <jennifer.averett@OARcorp.com> + + PR 1801/bsps + * shared/start.S: Add SMP support to LEON3 BSP. + 2011-06-19 Ralf Corsépius <ralf.corsepius@rtems.org> * Makefile.am: Remove references to non-existing files. diff --git a/c/src/lib/libbsp/sparc/shared/start.S b/c/src/lib/libbsp/sparc/shared/start.S index 0d5b30e33e..baed307b86 100644 --- a/c/src/lib/libbsp/sparc/shared/start.S +++ b/c/src/lib/libbsp/sparc/shared/start.S @@ -1,13 +1,15 @@ -/* - * start.s +/** + * @file * * Common start code for SPARC. * * This is based on the file srt0.s provided with the binary * distribution of the SPARC Instruction Simulator (SIS) found * at ftp://ftp.estec.esa.nl/pub/ws/wsd/erc32. - * - * COPYRIGHT (c) 1989-2006. + */ + +/* + * COPYRIGHT (c) 1989-2011. * On-Line Applications Research Corporation (OAR). * * The license and distribution terms for this file may be @@ -18,18 +20,31 @@ */ #include <rtems/asm.h> +#include <rtems/system.h> #include <bspopts.h> +#if defined(RTEMS_SMP) && defined(BSP_LEON3_SMP) + #define ENABLE_SMP +#endif + /* * Unexpected trap will halt the processor by forcing it to error state */ - #define BAD_TRAP \ ta 0; \ nop; \ nop; \ nop; +#if defined(ENABLE_SMP) +/* + * Variables to contain information used with bring a secondary core + * out of reset. + */ + .global bsp_ap_stack + .global bsp_ap_entry +#endif + /* * Software trap. Treat as BAD_TRAP for the time being... */ @@ -221,6 +236,23 @@ SYM(hard_reset): nop nop +#if defined(ENABLE_SMP) + rd %asr17, %g1 + srl %g1, 28, %g1 + and %g1, 0xff, %g1 ! extract cpu id + cmp %g1, 0 + beq cpu0 + nop + set SYM(bsp_ap_stack), %g1 ! set the stack pointer + ld [%g1], %sp + mov %sp, %fp + set SYM(bsp_ap_entry), %g1 ! where to start + ld [%g1], %g1 + call %g1 + nop +cpu0: +#endif + set (SYM(rdb_start)), %g6 ! End of RAM st %sp, [%g6] sub %sp, 4, %sp ! stack starts at end of RAM - 4 |