2010-12-22 Sebastian Huber <sebastian.huber@embedded-brains.de>

	* configure.ac: Added I2C options.  Fixed eMIOS prescaler.  Use
	standard linker command file support.
	* include/bsp.h: Declare I2C initialization function.
	* i2c/i2c_init.c: Implementation.
	* make/custom/gwlcfm.cfg, make/custom/mpc5566evb.cfg,
	make/custom/mpc55xx.inc: Use standard linker command file support.
	* startup/bspstart.c: More board specific settings.
	* Makefile.am, preinstall.am: Reflect changes above.

10 files changed, 395 insertions, 214 deletions

diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog b/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
index 3c585a2e2f..b2cb47d797 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
@@ -1,3 +1,14 @@
+2010-12-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* configure.ac: Added I2C options.  Fixed eMIOS prescaler.  Use
+	standard linker command file support.
+	* include/bsp.h: Declare I2C initialization function.
+	* i2c/i2c_init.c: Implementation.
+	* make/custom/gwlcfm.cfg, make/custom/mpc5566evb.cfg,
+	make/custom/mpc55xx.inc: Use standard linker command file support.
+	* startup/bspstart.c: More board specific settings.
+	* Makefile.am, preinstall.am: Reflect changes above.
+
 2010-08-23	Sebastian Huber <sebastian.huber@embedded-brains.de>
 
 	* test/tests.c: Removed file.
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
index 373c98648f..76b0d100ac 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
@@ -23,6 +23,7 @@ libbspstart_a_SOURCES += ../shared/start/rtems_crti.S
 project_lib_DATA += rtems_crti.$(OBJEXT)
 
 # Link commands
+project_lib_DATA += startup/linkcmds
 dist_project_lib_DATA += startup/linkcmds.gwlcfm  startup/linkcmds.mpc5566evb \
 	startup/linkcmds.base	
 
@@ -37,6 +38,7 @@ nodist_include_HEADERS = include/bspopts.h ../../shared/tod.h \
     ../../shared/include/coverhd.h
 include_bsp_HEADERS = include/mpc55xxevb.h \
     include/smsc9218i.h \
+    ../../../libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h \
     ../../shared/include/irq-generic.h \
     ../../shared/include/irq-info.h \
     ../../shared/include/utility.h \
@@ -60,8 +62,9 @@ libbsp_a_SOURCES += ../../shared/src/irq-generic.c \
 # Misc
 libbsp_a_SOURCES += startup/sd-card-init.c
 
-# bsp_i2c
-libbsp_a_SOURCES += i2c/i2c_init.c
+# I2C
+libbsp_a_SOURCES += i2c/i2c_init.c \
+    ../../../libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c
 
 # Network
 if HAS_NETWORKING
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
index f2f5dccb21..2796e45b8d 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
@@ -83,7 +83,7 @@ RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_MFD],
 [Must be defined to be the PLL multiplication factor for clock generation])
 
 RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[gwlcfm],[66])
-RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[*]     ,[0])
+RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[*]     ,[1])
 RTEMS_BSPOPTS_HELP([MPC55XX_EMIOS_PRESCALER],
 [Must be defined to set the EMIOS prescaler])
 
@@ -97,10 +97,16 @@ RTEMS_BSPOPTS_SET([BOARD_GWLCFM],[gwlcfm],[1])
 RTEMS_BSPOPTS_HELP([BOARD_GWLCFM],
 [If defined, use custom settings of for the GW_LCFM board])
 
+RTEMS_BSPOPTS_SET([RTEMS_BSP_I2C_EEPROM_DEVICE_NAME],[gwlcfm],['"eeprom"'])
+RTEMS_BSPOPTS_HELP([RTEMS_BSP_I2C_EEPROM_DEVICE_NAME],[EEPROM name for LibI2C])
+RTEMS_BSPOPTS_SET([RTEMS_BSP_I2C_EEPROM_DEVICE_PATH],[gwlcfm],['"/dev/i2c1.eeprom"'])
+RTEMS_BSPOPTS_HELP([RTEMS_BSP_I2C_EEPROM_DEVICE_PATH],[EEPROM device file path])
+
 AC_CONFIG_FILES([Makefile
 include/bspopts.h])
 
 RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
+RTEMS_BSP_LINKCMDS
 
 RTEMS_PPC_EXCEPTIONS
 
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c
index db07b67948..8bbda36058 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c
@@ -16,97 +16,55 @@
 +-----------------------------------------------------------------+
 | this file contains the low level MPC5516 I2C driver parameters  |
 \*===============================================================*/
-#if 0 /* FIXME: make this work... */
-#include <mpc55xx/mpc55xx_i2cdrv.h>
+
 #include <libchip/i2c-2b-eeprom.h>
-#include <bsp/irq.h>
+
 #include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/mpc83xx_i2cdrv.h>
 
-static mpc55xx_i2c_desc_t mpc55xx_i2c_bus_tbl[] = {
-  /* first channel */
-  {
-    {/* public fields */
-      .ops = &mpc55xx_i2c_ops,
-      .size = sizeof(mpc55xx_i2c_bus_tbl[0]),
+#ifdef MPC55XX_IRQ_I2C
+  static mpc83xx_i2c_desc_t mpc55xx_i2c_bus = {
+    .bus_desc = {
+      .ops = &mpc83xx_i2c_ops,
+      .size = sizeof(mpc55xx_i2c_bus),
     },
-    { /* our private fields */
-      .reg_ptr = &mpc55xx.i2c[0],
+    .softc = {
+      .reg_ptr = (m83xxI2CRegisters_t *) 0xfff88000,
       .initialized = FALSE,
-      .irq_number = BSP_IPIC_IRQ_I2C1,
-      .base_frq = 0 /* will be set during initiailization */
+      .irq_number = MPC55XX_IRQ_I2C,
+      .base_frq = 0
     }
-  }
-};
-
-rtems_libi2c_bus_t *mpc55xx_i2c_bus_descriptor[] = {
-  &mpc55xx_i2c_bus_tbl[0].bus_desc
-};
-
-/*=========================================================================*\
-| Function:                                                                 |
-\*-------------------------------------------------------------------------*/
-rtems_status_code bsp_register_i2c
-(
-/*-------------------------------------------------------------------------*\
-| Purpose:                                                                  |
-|   register I2C busses and devices                                         |
-+---------------------------------------------------------------------------+
-| Input Parameters:                                                         |
-\*-------------------------------------------------------------------------*/
- void                                    /* <none>                         */
-)
-/*-------------------------------------------------------------------------*\
-| Return Value:                                                             |
-|    0 or error code                                                        |
-\*=========================================================================*/
-
-{
-  int ret_code;
-  int i2c1_busno,i2c2_busno;
+  };
 
-  /*
-   * init I2C library (if not already done)
-   */
-  rtems_libi2c_initialize ();
+  rtems_status_code bsp_register_i2c(void)
+  {
+    int rv = 0;
+    int busno = 0;
+  
+    rtems_libi2c_initialize ();
+  
+    mpc55xx_i2c_bus.softc.base_frq = bsp_clock_speed;
+    busno = rtems_libi2c_register_bus(
+      "/dev/i2c1",
+      &mpc55xx_i2c_bus.bus_desc
+    );
+    if (busno < 0) {
+      return RTEMS_IO_ERROR;
+    }
 
-  /*
-   * FIXME: update input frequency of I2c modules into descriptor
-   */
-#if 0
-  /*
-   * I2C1 is clocked with TSEC 1
-   */
-  if (((mpc55xx.clk.sccr >> (31-1)) & 0x03) > 0) {
-    mpc55xx_i2c_bus_tbl[0].softc.base_frq =
-      (BSP_bus_frequency
-       /((mpc55xx.clk.sccr >> (31-1)) & 0x03));
+    #ifdef RTEMS_BSP_I2C_EEPROM_DEVICE_NAME
+      rv = rtems_libi2c_register_drv(
+        RTEMS_BSP_I2C_EEPROM_DEVICE_NAME,
+        i2c_2b_eeprom_driver_descriptor,
+        busno,
+        0x51
+      );
+      if (rv < 0) {
+        return RTEMS_IO_ERROR;
+      }
+    #endif
+  
+    return RTEMS_SUCCESSFUL;
   }
 #endif
-  mpc55xx_i2c_bus_tbl[1].softc.base_frq = BSP_bus_frequency;
-  /*
-   * register first I2C bus
-   */
-  ret_code = rtems_libi2c_register_bus("/dev/i2c1",
-				       mpc55xx_i2c_bus_descriptor[0]);
-  if (ret_code < 0) {
-    return -ret_code;
-  }
-  i2c1_busno = ret_code;
-
-#ifdef RTEMS_BSP_I2C_EEPROM_DEVICE_NAME
-
-  /*
-   * register EEPROM to bus 1, Address 0x50
-   */
-  ret_code = rtems_libi2c_register_drv(RTEMS_BSP_I2C_EEPROM_DEVICE_NAME,
-				       i2c_2b_eeprom_driver_descriptor,
-				       i2c1_busno,0x50);
-
-  if (ret_code < 0) {
-    return -ret_code;
-  }
-
-#endif /* RTEMS_BSP_I2C_EEPROM_DEVICE_NAME */
-  return 0;
-}
-#endif /* 0 */
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
index d781ad875a..6ff74b1d1e 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
@@ -18,8 +18,8 @@
  * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
  */
 
-#ifndef LIBBSP_POWERPC_BSP_H
-#define LIBBSP_POWERPC_BSP_H
+#ifndef LIBBSP_POWERPC_MPC55XXEVB_BSP_H
+#define LIBBSP_POWERPC_MPC55XXEVB_BSP_H
 
 #include <stdint.h>
 
@@ -64,10 +64,12 @@ int smsc9218i_attach_detach(
 
 #define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
 
+rtems_status_code bsp_register_i2c(void);
+
 #endif /* ASM */
 
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
 
-#endif /* LIBBSP_POWERPC_BSP_H */
+#endif /* LIBBSP_POWERPC_MPC55XXEVB_BSP_H */
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg
index 1b564425e1..f9a40532cb 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg
@@ -7,6 +7,4 @@
 # @brief configuration file for the GWLCFM MPC5516 board
 #
 
-RTEMS_LINKCMDS=linkcmds.gwlcfm
-
 include $(RTEMS_ROOT)/make/custom/mpc55xx.inc
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg
index 19f887a374..0e19d66284 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg
@@ -7,6 +7,4 @@
 # @brief Configuration file for MPC5566 evaluation board.
 #
 
-RTEMS_LINKCMDS=linkcmds.mpc5566evb
-
 include $(RTEMS_ROOT)/make/custom/mpc55xx.inc
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc
index 225995c7e4..faf493431f 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc
@@ -18,5 +18,3 @@ CPU_CFLAGS = -mcpu=8540 -meabi -msdata -fno-common -msoft-float \
     -D__ppc_generic -mstrict-align
 
 CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
-
-LDFLAGS += -qnolinkcmds -T $(RTEMS_LINKCMDS)
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am b/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am
index 5b3a5b3cf5..5d57d6e9cf 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am
@@ -49,6 +49,10 @@ $(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirst
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
 TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
 
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+
 $(PROJECT_LIB)/linkcmds.gwlcfm: startup/linkcmds.gwlcfm $(PROJECT_LIB)/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.gwlcfm
 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.gwlcfm
@@ -89,6 +93,10 @@ $(PROJECT_INCLUDE)/bsp/smsc9218i.h: include/smsc9218i.h $(PROJECT_INCLUDE)/bsp/$
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/smsc9218i.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/smsc9218i.h
 
+$(PROJECT_INCLUDE)/bsp/mpc83xx_i2cdrv.h: ../../../libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mpc83xx_i2cdrv.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mpc83xx_i2cdrv.h
+
 $(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
index 7ed5d92951..417a3da969 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
@@ -192,12 +192,14 @@ static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
   /* PD[ 8    ] I2C_SCL in/out */
   { 57, 1,{.B.PA = 2,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}}, 
   /* PD[ 9    ] I2C_SDA in/out */
-  { 58, 4,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PD[10..13] LS_CAN_EN/LED out*/
+  
+  { 58, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PD[10] LS_CAN_EN     out*/
+  { 59, 3,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, 
+  /* PD[11..13] PWO1_OC, MOCO_INT in */
+  
   { 62, 4,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PD[14..15] USB_FLGA/B    in */
 
-  { 64, 3,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 0.. 2] MLBCLK/SI/DI  in */
-  { 67, 2,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 3.. 4] MLBSO/DO      out*/
-  { 69, 1,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 5.. 5] MLBSLOT       in */
+  { 64, 5,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PE[ 0.. 4] LED_EXT1-5.   out*/
   { 70, 1,{.B.PA = 1,.B.SRC = 3,.B.WPE = 0}}, /* PE[ 6.. 6] CLKOUT        out*/
 
   { 80, 1,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 0.. 0] RD_WR         out*/
@@ -209,7 +211,8 @@ static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
 
   { 96,16,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PG[ 0..15] AD16..31   in/out*/
 
-  {112, 3,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 0.. 2] LED_EXT1-3.   out*/
+  {113, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 1.. 1] RES_MOSTComp  out*/
+  {114, 1,{.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 2.. 2] CS3_MOSTComp  out*/
   {115, 1,{.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 3.. 3] CS2_ETH       out*/
   {116, 2,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 4.. 5] FR/HC_TERM    out*/
   {118, 1,{.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 6.. 6] LIN_Tx        out*/
@@ -218,6 +221,19 @@ static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
 
   {0,0}
 };
+#elif defined(BOARD_PHYCORE_MPC5554)
+
+static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
+  {  0, 4,{.B.PA = 1,          .B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* !CS  [0:3]    */
+  {  4,24,{.B.PA = 1,          .B.DSC = 1                  }}, /* ADDR [8 : 31] */
+  { 28,32,{.B.PA = 1,          .B.DSC = 1                  }}, /* DATA [0 : 31] */
+  { 60, 4,{.B.PA = 1,          .B.DSC = 1,                 }}, /* TSIZ[0:1], RD_!WR, BDIP */
+  { 64, 6,{.B.PA = 1,          .B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* RD_!WR, BDIP, !WE, !OE, !TS */
+  { 89, 4,{.B.PA = 1                                       }}, /* ESCI_A and ESCI_B        */
+  {229, 4,{          .B.OBE= 1,.B.DSC = 1                  }}, /* CLKOUT */
+
+  {0,0}
+};
 
 #else /* MPC55xxEVB */
 
@@ -234,17 +250,307 @@ static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
 };
 #endif /* BOARD_GWLCFM */
 
+/*
+ * Arrays for setting up the chip selects.
+ * You can define up to four, and those with the valid bit
+ * set will be loaded into the matching chip select.
+ */
+static const struct EBI_CS_tag cs_setup[] = {
+#if defined(BOARD_GWLCFM)
+	/* CS0: External SRAM (16 bit, 1 wait states, 512kB, no burst) */
+	{
+        {
+            .B.BA = 0x20000000>>15,
+            .B.PS = 1,
+            .B.AD_MUX = 1,
+            .B.WEBS = 1,
+            .B.TBDIP = 0,
+            .B.BI = 1,
+            .B.V = 1
+        },
+        {
+            .B.AM = 0x1fff0,
+            .B.SCY = 1,
+            .B.BSCY = 0
+        }
+    },
+	/* CS1: External USB controller (16 bit, 3 wait states, 32kB, no burst) */
+	{
+        {
+            .B.BA = 0x22000000>>15,
+            .B.PS = 1,
+            .B.AD_MUX = 1,
+            .B.WEBS = 0,
+            .B.TBDIP = 0,
+            .B.BI = 1,
+            .B.V = 1
+        },
+        {
+            .B.AM = 0x1ffff,
+            .B.SCY = 3,
+            .B.BSCY = 0
+        }
+    },
+	/* CS2: Ethernet (16 bit, 2 wait states, 32kB, no burst) */
+	{
+        {
+            .B.BA = 0x22800000>>15,
+            .B.PS = 1,
+            .B.AD_MUX = 1,
+            .B.WEBS = 1,
+            .B.TBDIP = 0,
+            .B.BI = 1,
+            .B.V = 1
+        },
+        {
+            .B.AM = 0x1ffff,
+            .B.SCY = 1,
+            .B.BSCY = 0
+        }
+    },
+    {				/* CS3: MOST Companion. */
+        {
+            .B.BA = 0x23000000>>15,
+            .B.PS = 1,
+            .B.AD_MUX = 1,
+            .B.WEBS = 0,
+            .B.TBDIP = 0,
+            .B.BI = 1, 
+            .B.V = 1
+        },
+
+        {
+            .B.AM = 0x1fff0,
+            .B.SCY = 4,
+            .B.BSCY = 0
+        }
+    }
+#elif defined(BOARD_PHYCORE_MPC5554)
+    /* CS0: External flash. */
+    {
+        { .R = 0x20000003 },   /* Base 0x2000000, Burst Inhibit, Valid */
+        { .R = 0xff000050 }
+    },
+    /* CS1: External synchronous burst mode SRAM. */
+    {
+        { .R = 0x21000051 },   /* Base 0x2100000, 4-word Burst Enabled, Valid */
+        { .R = 0xff000000 }    /* No wait states. */
+    },
+    /* CS2: External LAN91C111 */
+    {
+        { .R = 0x22000003 },   /* Base 0x22000000, Burst inhibit, valid */
+        { .R = 0xff000010 }
+    },
+
+    /* CS3: External FPGA */
+    {
+        { .R = 0x23000003 },   /* Base 0x23000000, Burst inhibit, valid. */
+        { .R = 0xff000020 }
+    }
+#else /* default, MPC55xxEVB */
+	/* CS0: External SRAM (2 wait states, 512kB, 4 word burst) */
+    {
+        {
+            .B.BA = 0,
+            .B.PS = 1,
+            .B.BL = 1,
+            .B.WEBS = 0,
+            .B.TBDIP = 0,
+            .B.BI = 1, /* TODO: Enable burst */
+            .B.V = 1
+        },
+
+        {
+            .B.AM = 0x1fff0,
+            .B.SCY = 0,
+            .B.BSCY = 0
+        }
+    }, 
+    { { .R = 0 }, { .R = 0 } },   /* CS1: Unused. */
+    { { .R = 0 }, { .R = 0 } },   /* CS2: Unused. */
+    {   /* CS3: ethernet? */
+        {
+            .B.BA = 0x7fff,
+            .B.PS = 1,
+            .B.BL = 0,
+            .B.WEBS = 0,
+            .B.TBDIP = 0,
+            .B.BI = 1,
+            .B.V = 1
+        },
+
+        {
+            .B.AM = 0x1ffff,
+            .B.SCY = 1,
+            .B.BSCY = 0
+        }
+    }
+#endif /* Chip select setup */
+};
+
+/*
+ * Arrays for setting up the MAS registers.
+ * You can set as many as you want,we determine the size using sizeof.
+ */
+static const struct MMU_tag mmu_setup[] = {
+#if defined(BOARD_GWLCFM)
+    {
+        /* External Ethernet Controller (3 wait states, 64kB) */
+
+        {
+            .B.TLBSEL = 1,      /* MAS0 */
+            .B.ESEL = 5
+        },
+        {
+            .B.VALID = 1,       /* MAS1 */
+            .B.IPROT = 1,
+            .B.TSIZ = 1
+        },
+        {
+            .B.EPN = 0x3fff8,   /* MAS2 */
+            .B.I = 1,
+            .B.G = 1
+        },
+        {
+            .B.RPN = 0x3fff8,   /* MAS3 */
+            .B.UW = 1,
+            .B.SW = 1,
+            .B.UR = 1,
+            .B.SR = 1
+        }
+    }
+
+#elif defined(BOARD_PHYCORE_MPC5554)
+
+    /* XXX I'm not using TLB1 entry 2 the same way as 
+	 * in the BAM.
+     */
+    /*  Set up MMU TLB1 entry 2 for external ram. */
+    /*  Effective Base address = 0x2100_0000 XXX NOT LIKE BAM */
+    /*       Real Base address = 0x2100_0000 XXX NOT LIKE BAM */
+    /*  Page Size            6 =  4MB XXX Not like BAM */
+    /*  Not Guarded, Cache Enable, All Access (0, 3F) */
+    {
+        { .R = 0x10020000},     /* MAS0 */
+        { .R = 0xC0000600},     /* MAS1 */
+        { .R = 0x21000000},     /* MAS2 */
+        { .R = 0x2100003F}      /* MAS3 */
+    },
+
+    /*  Set up MMU TLB1 entry 5 for second half of SRAM (debug RAM) */
+    /*  Effective Base address = 0x2140_0000 */
+    /*       Real Base address = 0x2140_0000 */
+    /*  Page Size            6 = 4MB */
+    /*  Not Guarded, Cache Enable, All Access (0, 3F) */
+    {
+        { .R =  0x10050000 },   /* MAS0 */
+        { .R =  0xC0000600 },   /* MAS1 */
+        { .R =  0x21400000 },   /* MAS2 */
+        { .R =  0x2140003F }    /* MAS3 */
+    },
+    /*  Set up MMU TLB1 entry 6 for External LAN91C111 */
+    /*  Effective Base address = 0x2200_0000 */
+    /*       Real Base address = 0x2200_0000 */
+    /*  Page Size            7 = 16MB */
+    /*  Write-through, Guarded, Cache Inhibit, All Access (E, 3F) */
+    {
+        { .R = 0x10060000},     /* MAS0 */
+        { .R = 0xC0000700},     /* MAS1 */
+        { .R = 0x2200000E},     /* MAS2 */
+        { .R = 0x2200003F}      /* MAS3 */
+    },
+
+    /*  Set up MMU TLB1 entry 7 for External FPGA */
+    /*  Effective Base address = 0x2300_0000 */
+    /*       Real Base address = 0x2300_0000 */
+    /*  Page Size            7 = 16MB */
+    /*  Write-through, Guarded, Cache Inhibit, All Access (E, 3F) */
+    {
+        { .R = 0x10070000},     /* MAS0 */
+        { .R = 0xC0000700},     /* MAS1 */
+        { .R = 0x2300000E},     /* MAS2 */
+        { .R = 0x2300003F},     /* MAS3 */
+    },
+
+	/* Should also set up maps for the debug RAM and the
+	 * external flash.
+	 */
+#else /* default, MPC55xxEVB */
+    {
+        /* External Ethernet Controller (3 wait states, 64kB) */
+        {
+            .B.TLBSEL = 1,          /* MAS0 */
+            .B.ESEL = 5
+        },
+        {
+            .B.VALID = 1,           /* MAS1 */
+            .B.IPROT = 1,
+            .B.TSIZ = 1
+        },
+        {
+            .B.EPN = 0x3fff8,       /* MAS2 */
+            .B.I = 1,
+            .B.G = 1
+        },
+        {
+            .B.RPN = 0x3fff8,       /* MAS3 */
+            .B.UW = 1,
+            .B.SW = 1,
+            .B.UR = 1,
+            .B.SR = 1
+        }
+    }
+#endif /* MMU setup */
+};
+
+#ifdef MPC55XX_BOOTFLAGS
+/* mpc55xx_bootflag_0 is defined in start.S using PUBLIC_VAR().  I go through this
+ * indirection to avoid a linker issue - if I try to reference
+ * mpc55xx_bootflag_0 as an "extern uint32_t" I get a linker error.
+ * Maybe if I declare it as an "extern const uint32_t"?  Anyway, this works.
+ */
+extern void *mpc55xx_bootflag_0(void);
+uint32_t *p_mpc55xx_bootflag_0 = (uint32_t *)mpc55xx_bootflag_0;
+#endif
+
 static void mpc55xx_ebi_init(void)
 {
-	struct EBI_CS_tag cs = { .BR = MPC55XX_ZERO_FLAGS, .OR = MPC55XX_ZERO_FLAGS };
-	struct MMU_tag mmu = MMU_DEFAULT;
+    int i;
 	
+#if defined(BOARD_GWLCFM)
+    SIU.GPDO[122].B.PDO=1; /* make sure USB reset is kept high */
+    SIU.GPDO[121].B.PDO=1; /* make sure Ethernet reset is kept high */
+    SIU.GPDO[113].B.PDO=1; /* make sure MOST Companion reset is kept high */
+#endif /* defined(BOARD_GWLCFM) */
 	/*
 	 * init I/O pins to proper state
 	 */
 	mpc55xx_siu_pcr_init(&SIU,
 			     siu_pcr_list);
 
+    /* Set up chip selects. */
+    for (i = 0; i < sizeof(cs_setup) / sizeof(cs_setup[0]); i++) {
+        if (cs_setup[i].BR.B.V) {
+            EBI.CS [i] = cs_setup[i];
+        }
+    }
+
+#ifdef MPC55XX_BOOTFLAGS
+    /* If the low bit of bootflag 0 is clear don't change the MMU.
+     */
+    if (((*p_mpc55xx_bootflag_0) & 1))
+#endif
+      {
+        /* Set up MMU. */
+        for (i = 0; i < sizeof(mmu_setup) / sizeof(mmu_setup[0]); i++) {
+            PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS0, mmu_setup[i].MAS0.R);
+            PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS1, mmu_setup[i].MAS1.R);
+            PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS2, mmu_setup[i].MAS2.R);
+            PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS3, mmu_setup[i].MAS3.R);
+            asm volatile ("tlbwe");
+        }
+      }
+
 #if defined(BOARD_GWLCFM)
 	/*
 	 * init EBI for Muxed AD bus
@@ -255,111 +561,6 @@ static void mpc55xx_ebi_init(void)
 
 	SIU.ECCR.B.EBDF = 3;  /* use CLK/4 as bus clock */
 
-	/* External SRAM (16 bit, 2 wait states, 512kB, no burst) */
-
-	cs.BR.B.BA = 0;
-	cs.BR.B.PS = 1;
-	cs.BR.B.AD_MUX = 1;
-	cs.BR.B.WEBS = 1;
-	cs.BR.B.TBDIP = 0;
-	cs.BR.B.BI = 1; 
-	cs.BR.B.V = 1;
-
-	cs.OR.B.AM = 0x1fff0;
-	cs.OR.B.SCY = 0;
-	cs.OR.B.BSCY = 0;
-
-	EBI.CS [0] = cs;
-
-	/* External Ethernet Controller (3 wait states, 64kB) */
-
-	mmu.MAS0.B.ESEL = 5;
-	mmu.MAS1.B.VALID = 1;
-	mmu.MAS1.B.IPROT = 1;
-	mmu.MAS1.B.TSIZ = 1;
-	mmu.MAS2.B.EPN = 0x3fff8;
-	mmu.MAS2.B.I = 1;
-	mmu.MAS2.B.G = 1;
-	mmu.MAS3.B.RPN = 0x3fff8;
-	mmu.MAS3.B.UW = 1;
-	mmu.MAS3.B.SW = 1;
-	mmu.MAS3.B.UR = 1;
-	mmu.MAS3.B.SR = 1;
-
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS0, mmu.MAS0.R);
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS1, mmu.MAS1.R);
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS2, mmu.MAS2.R);
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS3, mmu.MAS3.R);
-
-	asm volatile ("tlbwe");
-
-	cs.BR.B.BA = 0x7fff;
-	cs.BR.B.PS = 1;
-	cs.BR.B.BL = 0;
-	cs.BR.B.AD_MUX = 1;
-	cs.BR.B.WEBS = 0;
-	cs.BR.B.TBDIP = 0;
-	cs.BR.B.BI = 1;
-	cs.BR.B.V = 1;
-
-	cs.OR.B.AM = 0x1ffff;
-	cs.OR.B.SCY = 1;
-	cs.OR.B.BSCY = 0;
-
-	EBI.CS [3] = cs;
-#else /* defined(BOARD_GWLCFM) */
-	
-	/* External SRAM (2 wait states, 512kB, 4 word burst) */
-
-	cs.BR.B.BA = 0;
-	cs.BR.B.PS = 1;
-	cs.BR.B.BL = 1;
-	cs.BR.B.WEBS = 0;
-	cs.BR.B.TBDIP = 0;
-	cs.BR.B.BI = 1; /* TODO: Enable burst */
-	cs.BR.B.V = 1;
-
-	cs.OR.B.AM = 0x1fff0;
-	cs.OR.B.SCY = 0;
-	cs.OR.B.BSCY = 0;
-
-	EBI.CS [0] = cs;
-
-	/* External Ethernet Controller (3 wait states, 64kB) */
-
-	mmu.MAS0.B.ESEL = 5;
-	mmu.MAS1.B.VALID = 1;
-	mmu.MAS1.B.IPROT = 1;
-	mmu.MAS1.B.TSIZ = 1;
-	mmu.MAS2.B.EPN = 0x3fff8;
-	mmu.MAS2.B.I = 1;
-	mmu.MAS2.B.G = 1;
-	mmu.MAS3.B.RPN = 0x3fff8;
-	mmu.MAS3.B.UW = 1;
-	mmu.MAS3.B.SW = 1;
-	mmu.MAS3.B.UR = 1;
-	mmu.MAS3.B.SR = 1;
-
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS0, mmu.MAS0.R);
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS1, mmu.MAS1.R);
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS2, mmu.MAS2.R);
-	PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS3, mmu.MAS3.R);
-
-	asm volatile ("tlbwe");
-
-	cs.BR.B.BA = 0x7fff;
-	cs.BR.B.PS = 1;
-	cs.BR.B.BL = 0;
-	cs.BR.B.WEBS = 0;
-	cs.BR.B.TBDIP = 0;
-	cs.BR.B.BI = 1;
-	cs.BR.B.V = 1;
-
-	cs.OR.B.AM = 0x1ffff;
-	cs.OR.B.SCY = 1;
-	cs.OR.B.BSCY = 0;
-
-	EBI.CS [3] = cs;
 #endif /* defined(BOARD_GWLCFM) */
 }
 
@@ -413,14 +614,14 @@ void bsp_start(void)
 	myCpu = get_ppc_cpu_type();
 	myCpuRevision = get_ppc_cpu_revision();
 
-	/* Time reference value */
-	bsp_clicks_per_usec = bsp_clock_speed / 1000000;
-
 	/*
 	 * determine clock speed
 	 */
 	bsp_clock_speed = mpc55xx_get_system_clock();
 
+	/* Time reference value */
+	bsp_clicks_per_usec = bsp_clock_speed / 1000000;
+
 	/* Initialize exceptions */
 	RTEMS_DEBUG_PRINT( "Initialize exceptions ...\n");
 	sc = ppc_exc_initialize(
@@ -444,9 +645,7 @@ void bsp_start(void)
 	}
 
 	/* Initialize eMIOS */
-	mpc55xx_emios_initialize( 1);
-
-	mpc55xx_emios_set_global_prescaler(MPC55XX_EMIOS_PRESCALER);
+	mpc55xx_emios_initialize( MPC55XX_EMIOS_PRESCALER);
 
 	/*
 	* Enable instruction and data caches. Do not force writethrough mode.