diff options
| author | Till Straumann <strauman@slac.stanford.edu> | 2006-06-19 20:08:41 +0000 |
|---|---|---|
| committer | Till Straumann <strauman@slac.stanford.edu> | 2006-06-19 20:08:41 +0000 |
| commit | d1999c8b8e909a8072cfbabf005dacc8d8405872 (patch) | |
| tree | 55dbf8f307f367871d3180a055d2cab9eadf24ff /c | |
| parent | FP context switch may be called from environment with no (diff) | |
| download | rtems-d1999c8b8e909a8072cfbabf005dacc8d8405872.tar.bz2 | |
fixed compiler warnings (bspIo.h inclusion, cast of number
constants to pointers). Enable L1 cache on mvme2100.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/ChangeLog | 6 | ||||
| -rw-r--r-- | c/src/lib/libbsp/powerpc/shared/startup/bspstart.c | 7 |
2 files changed, 10 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog index aea6a064fa..d5966db056 100644 --- a/c/src/lib/libbsp/powerpc/ChangeLog +++ b/c/src/lib/libbsp/powerpc/ChangeLog @@ -1,5 +1,11 @@ 2006-06-19 Till Straumann <strauman@slac.stanford.edu> + * shared/startup/bspstart.c: fixed compiler warnings + (bspIo.h inclusion, cast of number constants to pointers). + Enable L1 cache on mvme2100. + +2006-06-19 Till Straumann <strauman@slac.stanford.edu> + * shared/irq/irq_asm.S: Never allow the FPU to be switched on for integer-only tasks (new gcc may use FP regs implicitely). diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c index 49fcf8baaf..f6d05d66c4 100644 --- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @@ -22,6 +22,7 @@ #include <bsp.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> +#include <rtems/bspIo.h> #include <bsp/consoleIo.h> #include <libcpu/spr.h> #include <bsp/residual.h> @@ -171,8 +172,8 @@ unsigned int EUMBBAR; * Processor Address Map B (CHRP). */ unsigned int get_eumbbar() { - out_le32( 0xfec00000, 0x80000078 ); - return in_le32( 0xfee00000 ); + out_le32( (uint32_t*)0xfec00000, 0x80000078 ); + return in_le32( (uint32_t*)0xfee00000 ); } #endif @@ -234,13 +235,13 @@ void bsp_start( void ) EUMBBAR = get_eumbbar(); #endif -#if !defined(mpc8240) && !defined(mpc8245) /* * enables L1 Cache. Note that the L1_caches_enables() codes checks for * relevant CPU type so that the reason why there is no use of myCpu... */ L1_caches_enables(); +#if !defined(mpc8240) && !defined(mpc8245) /* * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for * relevant CPU type (mpc750)... |