diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-03-27 08:01:38 +0200 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-03-28 10:32:37 +0200 |
commit | cd3d74793a4e2ec93cefdddb855d4536d44c7e64 (patch) | |
tree | 574890f67343fda0dd79b6b5beeba28144c12414 /c | |
parent | posix: Fix pthread_detach() internal lock acquire (diff) | |
download | rtems-cd3d74793a4e2ec93cefdddb855d4536d44c7e64.tar.bz2 |
arm: Optimize context switch
Set CPU_ENABLE_ROBUST_THREAD_DISPATCH to TRUE. In this case the
interrupts are always enabled during a context switch even after
interrupt processing (see #2751). Remove the CPSR from the context
control since it contains only volatile bits.
Close #2954.
Diffstat (limited to 'c')
-rw-r--r-- | c/src/lib/libbsp/arm/tms570/startup/bspstart.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c index 7c1e9a17bf..025bb741d2 100644 --- a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c @@ -35,18 +35,6 @@ void bsp_start( void ) void *need_remap_ptr; unsigned int need_remap_int; - #if BYTE_ORDER == BIG_ENDIAN - /* - * If CPU is big endian (TMS570 family variant) - * set the CPU mode to supervisor and big endian. - * Do not set mode if CPU is little endian - * (RM48 family variant) for which default mode 0x13 - * defined in cpukit/score/cpu/arm/cpu.c - * is right. - */ - arm_cpu_mode = 0x213; - #endif - tms570_initialize_and_clear(); /* |