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authorGedare Bloom <gedare@rtems.org>2011-11-27 17:30:11 +0000
committerGedare Bloom <gedare@rtems.org>2011-11-27 17:30:11 +0000
commitcc3b482bc007e0d59a107e4aeefe8a3d582e930b (patch)
tree1d7f93eb4c0d0db5b95709772fcd0ea9084c59d8 /c
parent2011-11-27 Sebastien Bourdeauducq <seb@tmplab.org> (diff)
downloadrtems-cc3b482bc007e0d59a107e4aeefe8a3d582e930b.tar.bz2
2011-11-27 Sebastien Bourdeauducq <seb@tmplab.org>
PR 1970/bsps * include/system_conf.h: Support for the new Milkymist sysctl and clock frequency detection.
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libbsp/lm32/milkymist/ChangeLog6
-rw-r--r--c/src/lib/libbsp/lm32/milkymist/include/system_conf.h8
2 files changed, 11 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/lm32/milkymist/ChangeLog b/c/src/lib/libbsp/lm32/milkymist/ChangeLog
index fb1c143c4b..a1db551716 100644
--- a/c/src/lib/libbsp/lm32/milkymist/ChangeLog
+++ b/c/src/lib/libbsp/lm32/milkymist/ChangeLog
@@ -1,5 +1,11 @@
2011-11-27 Sebastien Bourdeauducq <seb@tmplab.org>
+ PR 1970/bsps
+ * include/system_conf.h: Support for the new Milkymist sysctl and clock
+ frequency detection.
+
+2011-11-27 Sebastien Bourdeauducq <seb@tmplab.org>
+
PR 1966/bsps
* include/system_conf.h: support for the new UART core and interrupt
map
diff --git a/c/src/lib/libbsp/lm32/milkymist/include/system_conf.h b/c/src/lib/libbsp/lm32/milkymist/include/system_conf.h
index 104578443a..17728c7982 100644
--- a/c/src/lib/libbsp/lm32/milkymist/include/system_conf.h
+++ b/c/src/lib/libbsp/lm32/milkymist/include/system_conf.h
@@ -15,9 +15,11 @@
#ifndef __SYSTEM_CONFIG_H_
#define __SYSTEM_CONFIG_H_
-#define CPU_FREQUENCY (80000000)
#define UART_BAUD_RATE (115200)
+/* Clock frequency */
+#define MM_FREQUENCY (0xe0001074)
+
/* FML bridge */
#define FMLBRG_FLUSH_BASE (0xc8000000)
#define FMLBRG_LINE_LENGTH (32)
@@ -65,10 +67,10 @@
#define GPIO_LED2 (0x00000002)
/* System ID and reset */
-#define MM_SYSTEM_ID (0xe000103c)
+#define MM_SYSTEM_ID (0xe000107c)
/* ICAP */
-#define MM_ICAP (0xe0001034)
+#define MM_ICAP (0xe0001040)
#define ICAP_READY (0x01)
#define ICAP_CE (0x10000)