diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2005-11-22 15:48:10 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2005-11-22 15:48:10 +0000 |
| commit | c2eeaaf4fc8cb91a1fffc1e0dc81b7e0e2527cfe (patch) | |
| tree | 38ae2eb6f319955ddb179154a8873ef8b02c8420 /c | |
| parent | 2005-11-22 Ralf Corsepius <ralf.corsepius@rtems.org> (diff) | |
| download | rtems-c2eeaaf4fc8cb91a1fffc1e0dc81b7e0e2527cfe.tar.bz2 | |
Fixed format.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libcpu/powerpc/ChangeLog | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog index 2add15fb80..536887b247 100644 --- a/c/src/lib/libcpu/powerpc/ChangeLog +++ b/c/src/lib/libcpu/powerpc/ChangeLog @@ -1,9 +1,9 @@ 2005-11-21 Till Straumann <strauman@slac.stanford.edu> - * new-exceptions/cpu_asm.S: the book says a context - synchronizing instruction (isync) is necessary after flipping - certain bits (e.g, MSR_FP) in msr -- since this could happen as - part of a context switch I added 'isync'. + * new-exceptions/cpu_asm.S: the book says a context + synchronizing instruction (isync) is necessary after flipping + certain bits (e.g, MSR_FP) in msr -- since this could happen as + part of a context switch I added 'isync'. 2005-11-07 Ralf Corsepius <ralf.corsepius@rtems.org> |