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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-07-30 15:54:53 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-07-31 15:09:04 +0200
commitc236082873cb4a2fd42af4ca0868106e1dd65422 (patch)
tree443a45e3a2ffadcf884c71ddd77035eedc0d6fa9 /c
parentscore: Format <rtems/score/percpu.h> (diff)
downloadrtems-c236082873cb4a2fd42af4ca0868106e1dd65422.tar.bz2
smp: Provide cache optimized Per_CPU_Control
Delete _Per_CPU_Information_p.
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libbsp/i386/shared/irq/irq_asm.S5
-rw-r--r--c/src/lib/libbsp/sparc/shared/irq_asm.S23
2 files changed, 15 insertions, 13 deletions
diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S
index 2b16234622..bbc1afb5d6 100644
--- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S
+++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S
@@ -99,9 +99,10 @@ SYM (_ISR_Handler):
.check_stack_switch:
movl esp, ebp /* ebp = previous stack pointer */
#if defined(RTEMS_SMP) && defined(BSP_HAS_SMP)
- movl $SYM(_Per_CPU_Information_p), ebx
call SYM(_CPU_SMP_Get_current_processor)
- mov (ebx,eax,4), ebx
+ sall $PER_CPU_CONTROL_SIZE_LOG2, eax
+ addl $SYM(_Per_CPU_Information), eax
+ movl eax, ebx
pushl ecx
call SYM(_ISR_SMP_Enter)
popl ecx
diff --git a/c/src/lib/libbsp/sparc/shared/irq_asm.S b/c/src/lib/libbsp/sparc/shared/irq_asm.S
index 5fb6a67682..eb2f9c593d 100644
--- a/c/src/lib/libbsp/sparc/shared/irq_asm.S
+++ b/c/src/lib/libbsp/sparc/shared/irq_asm.S
@@ -255,16 +255,18 @@ dont_fix_pil2:
SYM(_ISR_PER_CPU):
#if defined(RTEMS_SMP)
- sethi %hi(_Per_CPU_Information_p), %l5
- add %l5, %lo(_Per_CPU_Information_p), %l5
+ sethi %hi(_Per_CPU_Information), %l5
+ add %l5, %lo(_Per_CPU_Information), %l5
#if BSP_LEON3_SMP
/* LEON3 SMP support */
rd %asr17, %l7
srl %l7, 28, %l7 /* CPU number is upper 4 bits so shift */
- sll %l7, 2, %l7 /* l7 = offset */
- add %l5, %l7, %l5
+ #else
+ mov 0, %l7
+ nop
#endif
- ld [%l5], %l5 /* l5 = pointer to per CPU */
+ sll %l7, PER_CPU_CONTROL_SIZE_LOG2, %l7 /* l7 = offset */
+ add %l5, %l7, %l5 /* l5 = pointer to per CPU */
/*
* On multi-core system, we need to use SMP safe versions
@@ -456,19 +458,18 @@ isr_dispatch:
*/
#if defined(RTEMS_SMP)
- sethi %hi(_Per_CPU_Information_p), %l5
- ld [%l5 + %lo(_Per_CPU_Information_p)], %l5
+ sethi %hi(_Per_CPU_Information), %l5
+ add %l5, %lo(_Per_CPU_Information), %l5
#if BSP_LEON3_SMP
/* LEON3 SMP support */
rd %asr17, %l7
srl %l7, 28, %l7 /* CPU number is upper 4 bits so shift */
- sll %l7, 2, %l7 /* l7 = offset */
- add %l5, %l7, %l5
#else
- nop
+ mov 0, %l7
nop
#endif
- ld [%l5], %l5 /* l5 = pointer to per CPU */
+ sll %l7, PER_CPU_CONTROL_SIZE_LOG2, %l7 /* l7 = offset */
+ add %l5, %l7, %l5 /* l5 = pointer to per CPU */
#else
sethi %hi(_Per_CPU_Information), %l5
add %l5, %lo(_Per_CPU_Information), %l5