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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-14 14:42:56 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-18 07:30:34 +0100 |
| commit | c11ac2d59dce04b189948dd851b1f1eb6f9a4a52 (patch) | |
| tree | 10114a822aa8bab90683fc7d4ea530db51abdf0e /c | |
| parent | score: Allow interrupts during thread dispatch (diff) | |
| download | rtems-c11ac2d59dce04b189948dd851b1f1eb6f9a4a52.tar.bz2 | |
sparc: Use Per_CPU_Control::isr_dispatch_disable
Update #2751.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/sparc/shared/irq_asm.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/irq_asm.S b/c/src/lib/libbsp/sparc/shared/irq_asm.S index a842a62a1e..fc89932e00 100644 --- a/c/src/lib/libbsp/sparc/shared/irq_asm.S +++ b/c/src/lib/libbsp/sparc/shared/irq_asm.S @@ -74,7 +74,7 @@ SYM(_CPU_Context_switch): std %o6, [%o0 + O6_SP_OFFSET] ! save the output registers ! load the ISR stack nesting prevention flag - ld [%g6 + SPARC_PER_CPU_ISR_DISPATCH_DISABLE], %o4 + ld [%g6 + PER_CPU_ISR_DISPATCH_DISABLE], %o4 ! save it a bit later so we do not waste a couple of cycles rd %psr, %o2 @@ -217,7 +217,7 @@ done_flushing: ldd [%o1 + L6_OFFSET], %l6 ! Now restore thread specific ISR dispatch prevention flag - st %o2, [%g6 + SPARC_PER_CPU_ISR_DISPATCH_DISABLE] + st %o2, [%g6 + PER_CPU_ISR_DISPATCH_DISABLE] ldd [%o1 + I0_OFFSET], %i0 ! restore the input registers ldd [%o1 + I2_OFFSET], %i2 @@ -594,7 +594,7 @@ profiling_not_outer_most_exit: nop ! Are we dispatching from a previous ISR in the interrupted thread? - ld [%g6 + SPARC_PER_CPU_ISR_DISPATCH_DISABLE], %l7 + ld [%g6 + PER_CPU_ISR_DISPATCH_DISABLE], %l7 orcc %l7, %g0, %g0 ! Is this thread already doing an ISR? bnz simple_return ! Yes, then do a "simple" exit nop @@ -617,7 +617,7 @@ profiling_not_outer_most_exit: ! Set ISR dispatch nesting prevention flag mov 1,%l6 - st %l6, [%g6 + SPARC_PER_CPU_ISR_DISPATCH_DISABLE] + st %l6, [%g6 + PER_CPU_ISR_DISPATCH_DISABLE] /* * The following subtract should get us back on the interrupted @@ -726,7 +726,7 @@ thread_dispatch_done: ! No, then clear out and return ! Zero out ISR stack nesting prevention flag - st %g0, [%g6 + SPARC_PER_CPU_ISR_DISPATCH_DISABLE] + st %g0, [%g6 + PER_CPU_ISR_DISPATCH_DISABLE] /* * The CWP in place at this point may be different from |