2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>

	* configure.ac, startup/bspstart.c: Use standard cache BSP options.

6 files changed, 21 insertions, 25 deletions

diff --git a/c/src/lib/libbsp/powerpc/gen5200/ChangeLog b/c/src/lib/libbsp/powerpc/gen5200/ChangeLog
index c7dea79cc2..df17d23378 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/gen5200/ChangeLog
@@ -1,3 +1,7 @@
+2011-06-07	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* configure.ac, startup/bspstart.c: Use standard cache BSP options.
+
 2011-02-11	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* include/tm27.h:
diff --git a/c/src/lib/libbsp/powerpc/gen5200/configure.ac b/c/src/lib/libbsp/powerpc/gen5200/configure.ac
index 286c6d7850..a931aa5c7e 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/configure.ac
+++ b/c/src/lib/libbsp/powerpc/gen5200/configure.ac
@@ -15,15 +15,11 @@ RTEMS_PROG_CC_FOR_TARGET
 RTEMS_CANONICALIZE_TOOLS
 RTEMS_PROG_CCAS
 
-RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
-RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
-[If defined, the data cache will be enabled after address translation
- is turned on.])
-
-RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
-RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
-[If defined, the instruction cache will be enabled after address translation
- is turned on.])
+RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1])
+RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
+
+RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1])
+RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
 
 RTEMS_BSPOPTS_SET([BENCHMARK_IRQ_PROCESSING],[*],[0])
 RTEMS_BSPOPTS_HELP([BENCHMARK_IRQ_PROCESSING],
diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
index f90ac19514..81847882e7 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
@@ -149,10 +149,10 @@ void bsp_start(void)
   /*
    * Enable instruction and data caches. Do not force writethrough mode.
    */
-  #if INSTRUCTION_CACHE_ENABLE
+  #if BSP_INSTRUCTION_CACHE_ENABLED
     rtems_cache_enable_instruction();
   #endif
-  #if DATA_CACHE_ENABLE
+  #if BSP_DATA_CACHE_ENABLED
     rtems_cache_enable_data();
   #endif
 
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
index d5dc8bc28e..a8f8e65672 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
@@ -1,3 +1,7 @@
+2011-06-07	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* configure.ac, startup/bspstart.c: Use standard cache BSP options.
+
 2011-02-11	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* startup/cpuinit.c:
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
index a95442b5f6..87551c3160 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
+++ b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
@@ -15,15 +15,11 @@ RTEMS_PROG_CC_FOR_TARGET
 RTEMS_CANONICALIZE_TOOLS
 RTEMS_PROG_CCAS
 
-RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
-RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
-[If defined, the data cache will be enabled after address translation
- is turned on.])
+RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1])
+RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
 
-RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
-RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
-[If defined, the instruction cache will be enabled after address translation
- is turned on.])
+RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1])
+RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
 
 RTEMS_BSPOPTS_SET([MPC8313ERDB],[mpc8313erdb],[1])
 RTEMS_BSPOPTS_HELP([MPC8313ERDB],
@@ -58,10 +54,6 @@ RTEMS_BSPOPTS_HELP([BSP_USE_UART2],[If defined, enables UART2.])
 RTEMS_BSPOPTS_SET([HAS_UBOOT],[mpc8313erdb],[1])
 RTEMS_BSPOPTS_HELP([HAS_UBOOT],[If defined, enables U-Boot support.])
 
-RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1])
-RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], [If defined, then the PowerPC specific
- code in RTEMS will use data cache instructions to optimize the context switch code.])
-
 RTEMS_BSPOPTS_SET([GEN83XX_ENABLE_INTERRUPT_NESTING],[*],[1])
 RTEMS_BSPOPTS_HELP([GEN83XX_ENABLE_INTERRUPT_NESTING],[enable interrupt nesting])
 
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
index f5ea69cfea..c72bf65968 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
@@ -96,11 +96,11 @@ void bsp_start( void)
    * Enable instruction and data caches. Do not force writethrough mode.
    */
 
-#if INSTRUCTION_CACHE_ENABLE
+#if BSP_INSTRUCTION_CACHE_ENABLED
   rtems_cache_enable_instruction();
 #endif
 
-#if DATA_CACHE_ENABLE
+#if BSP_DATA_CACHE_ENABLED
   rtems_cache_enable_data();
 #endif