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authorTill Straumann <strauman@slac.stanford.edu>2009-10-29 03:20:21 +0000
committerTill Straumann <strauman@slac.stanford.edu>2009-10-29 03:20:21 +0000
commitabf41fdf99342accdc5047eb146b7b54c8d4a7eb (patch)
treea1d3f611298594290a75a7eb46914997a13f8f44 /c
parent2009-10-28 Till Straumann <strauman@slac.stanford.edu> (diff)
downloadrtems-abf41fdf99342accdc5047eb146b7b54c8d4a7eb.tar.bz2
2009-10-28 Till Straumann <strauman@slac.stanford.edu>
* shared/irq/irq_asm.S: Make sure stack is aligned to CPU_STACK_ALIGNMENT before invoking C-code.
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libbsp/i386/ChangeLog5
-rw-r--r--c/src/lib/libbsp/i386/shared/irq/irq_asm.S22
2 files changed, 23 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/i386/ChangeLog b/c/src/lib/libbsp/i386/ChangeLog
index c726a767d8..b84e14625f 100644
--- a/c/src/lib/libbsp/i386/ChangeLog
+++ b/c/src/lib/libbsp/i386/ChangeLog
@@ -1,3 +1,8 @@
+2009-10-28 Till Straumann <strauman@slac.stanford.edu>
+
+ * shared/irq/irq_asm.S: Make sure stack is aligned to
+ CPU_STACK_ALIGNMENT before invoking C-code.
+
2009-10-17 Chris Johns <chrisj@rtems.org>
* shared/irq/idt.c: Check is the irq handlers are present before
diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S
index c8f3df3b5e..d39ff81e72 100644
--- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S
+++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S
@@ -13,6 +13,11 @@
#include <rtems/asm.h>
#include <bsp/irq_asm.h>
+#include <rtems/score/cpu.h>
+
+#ifndef CPU_STACK_ALIGNMENT
+#error "Missing header? CPU_STACK_ALIGNMENT is not defined here"
+#endif
BEGIN_CODE
@@ -95,26 +100,35 @@ SYM (_ISR_Handler):
nested:
incl SYM (_ISR_Nest_level) /* one nest level deeper */
incl SYM (_Thread_Dispatch_disable_level) /* disable multitasking */
+
+ /*
+ * Ensure CPU_STACK_ALIGNMENT for C-code.
+ * esp = (esp - 4) & ~(CPU_STACK_ALIGNMENT - 1)
+ * makes sure 'esp' is aligned AND there is enough space
+ * for the vector argument on the stack!
+ */
+ subl $4, esp
+
+ andl $ - CPU_STACK_ALIGNMENT, esp
/*
* re-enable interrupts at processor level as the current
* interrupt source is now masked via i8259
*/
sti
- /*
+ /*
* ECX is preloaded with the vector number but it is a scratch register
* so we must save it again.
*/
- pushl ecx /* push vector number */
+ movl ecx, (esp) /* store vector arg in stack */
call C_dispatch_isr
- addl $4, esp
/*
* disable interrupts_again
*/
cli
- popl ecx /* ecx = vector number */
+
/*
* restore stack
*/