diff options
| author | Eric Norum <WENorum@lbl.gov> | 2006-05-15 15:59:01 +0000 |
|---|---|---|
| committer | Eric Norum <WENorum@lbl.gov> | 2006-05-15 15:59:01 +0000 |
| commit | 8a742ddf67ca148e9bd27b109b6848f175c321fc (patch) | |
| tree | 03924a58c6e655744b4daf13664f6f7450568a71 /c | |
| parent | Improve handling of unexpected FPGA interrupt conditions. (diff) | |
| download | rtems-8a742ddf67ca148e9bd27b109b6848f175c321fc.tar.bz2 | |
Allow single spurious FPGA interrupt.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/ChangeLog | 1 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c | 11 |
2 files changed, 9 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/m68k/uC5282/ChangeLog b/c/src/lib/libbsp/m68k/uC5282/ChangeLog index dd32f16f7c..452ab448a3 100644 --- a/c/src/lib/libbsp/m68k/uC5282/ChangeLog +++ b/c/src/lib/libbsp/m68k/uC5282/ChangeLog @@ -1,6 +1,7 @@ 2006-05-15 Eric Norum <norume@aps.anl.gov> * startup/bspstart.c: Add checks for FPGA interrupt request overflow. + Allow single spurious FPGA interrupt. 2006-04-11 Eric Norum <norume@aps.anl.gov> diff --git a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c index 28e5e4bc55..805d35565e 100644 --- a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c @@ -476,7 +476,7 @@ trampoline (rtems_vector_number v) if (++loopcount >= 50) { rtems_interrupt_level level; rtems_interrupt_disable(level); - printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v); + printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v & 0x3f); MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1; rtems_interrupt_enable(level); return; @@ -486,9 +486,14 @@ trampoline (rtems_vector_number v) } else { rtems_interrupt_level level; + rtems_vector_number nv; rtems_interrupt_disable(level); - printk("\nINVALID FPGA INTERRUPT (0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v); - MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1; + printk("\nSPURIOUS FPGA INTERRUPT (0x%x).\n", v & 0x3f); + if ((((nv = FPGA_IRQ_INFO) & 0x80) != 0) + && ((nv & 0x3f) == (v & 0x3f))) { + printk("DISABLING ALL FPGA INTERRUPTS.\n"); + MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1; + } rtems_interrupt_enable(level); return; } |