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author | Ric Claus <claus@slac.stanford.edu> | 2012-11-30 16:12:59 -0800 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-12-01 09:04:33 +0100 |
commit | 809b726ae113ccef6bc2a2f206789e24dd6807d3 (patch) | |
tree | b7c78328bd2111b777a533ecc9a6670e131f3107 /c | |
parent | Virtex5 BSP: Various updates and improvements. (diff) | |
download | rtems-809b726ae113ccef6bc2a2f206789e24dd6807d3.tar.bz2 |
Print MCSR and ESR.
The Machine Check and Exception Syndrome Registers on Book-E and Book-E-like
processors contain useful information for decoding the cause of an exception.
NB: This patch depends on the PR 2048 patch sent earlier having been applied.
Diffstat (limited to 'c')
-rw-r--r-- | c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c index 34233baff2..6172ab650d 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c +++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c @@ -45,9 +45,9 @@ static uint32_t ppc_exc_get_DAR_dflt(void) break; case PPC_BOOKE_STD: case PPC_BOOKE_E500: - return PPC_SPECIAL_PURPOSE_REGISTER(DEAR_BOOKE); + return PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_DEAR); case PPC_BOOKE_405: - return PPC_SPECIAL_PURPOSE_REGISTER(DEAR_405); + return PPC_SPECIAL_PURPOSE_REGISTER(PPC405_DEAR); } return 0xdeadbeef; } @@ -157,11 +157,24 @@ void _BSP_Exception_frame_print(const CPU_Exception_frame *excPtr) /* Would be great to print DAR but unfortunately, * that is not portable across different CPUs. * AFAIK on classic PPC DAR is SPR 19, on the - * 405 we have DEAR = SPR 0x3d5 and booE says + * 405 we have DEAR = SPR 0x3d5 and bookE says * DEAR = SPR 61 :-( */ if (ppc_exc_get_DAR != NULL) { - printk(" DAR = 0x%08x\n", ppc_exc_get_DAR()); + char* reg = ppc_cpu_is_60x() ? " DAR" : "DEAR"; + printk(" %s = 0x%08x\n", reg, ppc_exc_get_DAR()); + } + if (ppc_cpu_is_bookE()) { + unsigned esr, mcsr; + if (ppc_cpu_is_bookE() == PPC_BOOKE_405) { + esr = PPC_SPECIAL_PURPOSE_REGISTER(PPC405_ESR); + mcsr = PPC_SPECIAL_PURPOSE_REGISTER(PPC405_MCSR); + } else { + esr = PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_ESR); + mcsr = PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_MCSR); + } + printk(" ESR = 0x%08x\n", esr); + printk(" MCSR = 0x%08x\n", mcsr); } if (executing != NULL) { |