bsp/lpc32xx: Add lpc32xx_select_nand_controller()

3 files changed, 53 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/arm/lpc32xx/Makefile.am b/c/src/lib/libbsp/arm/lpc32xx/Makefile.am
index 6cfcf89c0e..09c385d25a 100644
--- a/c/src/lib/libbsp/arm/lpc32xx/Makefile.am
+++ b/c/src/lib/libbsp/arm/lpc32xx/Makefile.am
@@ -136,6 +136,7 @@ libbsp_a_SOURCES += misc/nand-mlc-write-blocks.c
 libbsp_a_SOURCES += misc/restart.c
 libbsp_a_SOURCES += misc/system-clocks.c
 libbsp_a_SOURCES += misc/timer.c
+libbsp_a_SOURCES += misc/nand-select.c
 
 # SSP
 
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h
index 74627ae4df..c1fcec3c75 100644
--- a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h
+++ b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h
@@ -138,6 +138,14 @@ uint32_t lpc32xx_arm_clk(void);
 
 uint32_t lpc32xx_dram_clk(void);
 
+typedef enum {
+  LPC32XX_NAND_CONTROLLER_NONE,
+  LPC32XX_NAND_CONTROLLER_MLC,
+  LPC32XX_NAND_CONTROLLER_SLC
+} lpc32xx_nand_controller;
+
+void lpc32xx_select_nand_controller(lpc32xx_nand_controller nand_controller);
+
 void bsp_restart(void *addr);
 
 #define BSP_CONSOLE_UART_BASE LPC32XX_BASE_UART_5
diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/nand-select.c b/c/src/lib/libbsp/arm/lpc32xx/misc/nand-select.c
new file mode 100644
index 0000000000..533680ee92
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc32xx/misc/nand-select.c
@@ -0,0 +1,44 @@
+/**
+ * @file
+ *
+ * @ingroup lpc32xx
+ *
+ * @brief NAND controller selection.
+ */
+
+/*
+ * Copyright (c) 2012 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/lpc32xx.h>
+#include <bsp/nand-mlc.h>
+
+void lpc32xx_select_nand_controller(lpc32xx_nand_controller nand_controller)
+{
+  uint32_t flashclk_ctrl = LPC32XX_FLASHCLK_CTRL & ~(FLASHCLK_IRQ_MLC
+    | FLASHCLK_SELECT_SLC | FLASHCLK_MLC_CLK_ENABLE | FLASHCLK_SLC_CLK_ENABLE);
+
+  switch (nand_controller) {
+    case LPC32XX_NAND_CONTROLLER_MLC:
+      flashclk_ctrl |= FLASHCLK_IRQ_MLC | FLASHCLK_MLC_CLK_ENABLE;
+      break;
+    case LPC32XX_NAND_CONTROLLER_SLC:
+      flashclk_ctrl |= FLASHCLK_SELECT_SLC | FLASHCLK_SLC_CLK_ENABLE;
+      break;
+    default:
+      break;
+  }
+
+  LPC32XX_FLASHCLK_CTRL = flashclk_ctrl;
+}