diff options
| author | Till Straumann <strauman@slac.stanford.edu> | 2006-07-12 23:39:48 +0000 |
|---|---|---|
| committer | Till Straumann <strauman@slac.stanford.edu> | 2006-07-12 23:39:48 +0000 |
| commit | 689429f8d6ab96c726177355e1cdbd292badcc4f (patch) | |
| tree | cb3e16bed8f14a736c8aed1bdd03338ea1872119 /c | |
| parent | * shared/startup/panic.c: Fixed compiler warnings. (diff) | |
| download | rtems-689429f8d6ab96c726177355e1cdbd292badcc4f.tar.bz2 | |
* shared/startup/probeMemEnd.c: added paranoia to inline
assembly code; added 'memory' clobbers and made sure
any registers modified by the 'asm' appear in the output
operands.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/ChangeLog | 9 | ||||
| -rw-r--r-- | c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c | 17 |
2 files changed, 18 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog index cd23dd5711..1f0f57fd76 100644 --- a/c/src/lib/libbsp/powerpc/ChangeLog +++ b/c/src/lib/libbsp/powerpc/ChangeLog @@ -1,4 +1,11 @@ -2006-06-19 Till Straumann <strauman@slac.stanford.edu> +2006-07-12 Till Straumann <strauman@slac.stanford.edu> + + * shared/startup/probeMemEnd.c: added paranoia to inline + assembly code; added 'memory' clobbers and made sure + any registers modified by the 'asm' appear in the output + operands. + +2006-07-12 Till Straumann <strauman@slac.stanford.edu> * shared/startup/panic.c: Fixed compiler warnings. diff --git a/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c b/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c index dea3947342..8012f89221 100644 --- a/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c +++ b/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c @@ -49,6 +49,8 @@ extern uint32_t __rtems_end[]; void __here_s_the_real_end(); #define SWITCH_MSR(msr) \ + do { \ + register uint32_t __rr; \ asm volatile( \ " mtsrr1 %0 \n" \ " bl 1f \n" \ @@ -58,10 +60,11 @@ void __here_s_the_real_end(); " sync \n" \ " rfi \n" \ "1: \n" \ - : \ - :"b"(msr) \ - :"lr" \ - ) + :"=b&"(__rr) \ + :"0"(msr) \ + :"lr","memory" \ + ); \ + } while (0) SPR_RW(L2CR) SPR_RW(L3CR) @@ -116,7 +119,7 @@ register uint32_t v, x; x = 1<<(31-19); v = doLock ? v | x : v & ~x; _write_HID0(v); - asm volatile("sync"); + asm volatile("sync":::"memory"); return 0; } @@ -160,7 +163,7 @@ register uint32_t flags; *probe = tag; /* make sure it's written out */ - asm volatile ("sync"); + asm volatile ("sync":::"memory"); /* try to read back */ if ( tag != *probe ) { @@ -169,7 +172,7 @@ register uint32_t flags; /* restore */ *probe = scratch; /* make sure the icache is not contaminated */ - asm volatile ("sync; icbi 0, %0"::"r"(probe)); + asm volatile ("sync; icbi 0, %0"::"r"(probe):"memory"); } SWITCH_MSR(flags); |