diff options
author | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2008-07-17 14:39:17 +0000 |
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committer | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2008-07-17 14:39:17 +0000 |
commit | 677cf05fe1165998da8c09c354eddfa55313e4f9 (patch) | |
tree | 390d2b89618cc26ca4033027ead9004ca25d0d43 /c | |
parent | Fixed typo in access macros for device control registers (DCR) (diff) | |
download | rtems-677cf05fe1165998da8c09c354eddfa55313e4f9.tar.bz2 |
bugfixes for mpc8349eamds BSP
Diffstat (limited to 'c')
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/ChangeLog | 8 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/network/network.c | 6 | ||||
-rw-r--r-- | c/src/lib/libcpu/powerpc/ChangeLog | 9 | ||||
-rw-r--r-- | c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h | 2 | ||||
-rw-r--r-- | c/src/lib/libcpu/powerpc/shared/src/cache_.h | 2 |
5 files changed, 22 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog index 624bc77349..b3ddac2d9f 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog +++ b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog @@ -1,7 +1,15 @@ +<<<<<<< ChangeLog +2008-05-15 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> + + * network/network.c: + mpc8249eamds uses gmii mode + +======= 2008-07-17 Ralf Corsépius <ralf.corsepius@rtems.org> * configure.ac: Remove RTEMS_AMPOLISH3. +>>>>>>> 1.31 2008-07-14 Sebastian Huber <sebastian.huber@embedded-brains.de> * irq/irq_init.c, irq/irq.h, startup/linkcmds: diff --git a/c/src/lib/libbsp/powerpc/gen83xx/network/network.c b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c index c44c71e3db..fb4aecfd9e 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/network/network.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c @@ -35,7 +35,7 @@ #elif defined( MPC8349EAMDS) -#define TSEC_IFMODE TSEC_IFMODE_RGMII +#define TSEC_IFMODE TSEC_IFMODE_GMII #elif defined( HSC_CM01) @@ -80,9 +80,9 @@ int BSP_tsec_attach if (unitNumber == 1) { /* * init system I/O configuration registers - * to ensure proper pin functions + * to ensure proper pin functions for TSEC1_RX_ER and TSEC1_TX_ER */ - mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x1f800000; + mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x02800000; /* * init port registers (GPIO2DIR) for TSEC1 */ diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog index 7ebf972f68..13b1884e80 100644 --- a/c/src/lib/libcpu/powerpc/ChangeLog +++ b/c/src/lib/libcpu/powerpc/ChangeLog @@ -1,5 +1,14 @@ 2008-07-17 Thomas Doerfler <thomas.doerfler@embedded-brains.de> + * rtems/powerpc/powerpc.h: + ppc405 uses definitions distinct from ppc403 now + + * shared/src/cache_.h: + use correct powerpc.h to get cache attributes + + +2008-07-17 Thomas Doerfler <thomas.doerfler@embedded-brains.de> + * shared/include/powerpc-utility.h: Fixed typo in access macros for device control registers (DCR) diff --git a/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h b/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h index 4b1ed24529..05ce800746 100644 --- a/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h +++ b/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h @@ -107,7 +107,7 @@ extern "C" { * predefines. */ -#if defined(ppc403) || defined(ppc405) +#if defined(ppc403) /* * IBM 403 * diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache_.h b/c/src/lib/libcpu/powerpc/shared/src/cache_.h index 5851f0818b..2eddab59a1 100644 --- a/c/src/lib/libcpu/powerpc/shared/src/cache_.h +++ b/c/src/lib/libcpu/powerpc/shared/src/cache_.h @@ -9,7 +9,7 @@ #ifndef LIBCPU_POWERPC_CACHE_H #define LIBCPU_POWERPC_CACHE_H -#include <rtems/score/powerpc.h> +#include <rtems/powerpc/powerpc.h> /* Provide the CPU defines only if we have a cache */ #if PPC_CACHE_ALIGNMENT != PPC_NO_CACHE_ALIGNMENT |