diff options
author | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2008-08-26 11:55:31 +0000 |
---|---|---|
committer | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2008-08-26 11:55:31 +0000 |
commit | 4b23c94504618646e52be35c4e2172f132da5421 (patch) | |
tree | bd988d39ff60adcf1b9f06acadfb42c97a43ff0c /c | |
parent | 2008-08-26 Ralf Corsépius <ralf.corsepius@rtems.org> (diff) | |
download | rtems-4b23c94504618646e52be35c4e2172f132da5421.tar.bz2 |
various changes to gen83xx BSP and others
Diffstat (limited to 'c')
-rw-r--r-- | c/src/lib/libbsp/bfin/acinclude.m4 | 2 | ||||
-rw-r--r-- | c/src/lib/libbsp/m68k/acinclude.m4 | 4 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/ChangeLog | 7 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h | 54 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/network/network.c | 9 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c | 14 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.hsc_cm01 | 2 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/mvme3100/preinstall.am | 4 | ||||
-rw-r--r-- | c/src/lib/libcpu/powerpc/ChangeLog | 10 | ||||
-rw-r--r-- | c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c | 11 | ||||
-rw-r--r-- | c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h | 63 | ||||
-rw-r--r-- | c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c | 17 |
12 files changed, 168 insertions, 29 deletions
diff --git a/c/src/lib/libbsp/bfin/acinclude.m4 b/c/src/lib/libbsp/bfin/acinclude.m4 index 9c730bd99c..ebab950593 100644 --- a/c/src/lib/libbsp/bfin/acinclude.m4 +++ b/c/src/lib/libbsp/bfin/acinclude.m4 @@ -2,8 +2,6 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR], [ case "$1" in - bf537Stamp ) - AC_CONFIG_SUBDIRS([bf537Stamp]);; eZKit533 ) AC_CONFIG_SUBDIRS([eZKit533]);; *) diff --git a/c/src/lib/libbsp/m68k/acinclude.m4 b/c/src/lib/libbsp/m68k/acinclude.m4 index 4bd15a6adb..8c7650d4ec 100644 --- a/c/src/lib/libbsp/m68k/acinclude.m4 +++ b/c/src/lib/libbsp/m68k/acinclude.m4 @@ -18,12 +18,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR], AC_CONFIG_SUBDIRS([idp]);; mcf5206elite ) AC_CONFIG_SUBDIRS([mcf5206elite]);; - mcf52235 ) - AC_CONFIG_SUBDIRS([mcf52235]);; mcf5235 ) AC_CONFIG_SUBDIRS([mcf5235]);; - mcf5329 ) - AC_CONFIG_SUBDIRS([mcf5329]);; mrm332 ) AC_CONFIG_SUBDIRS([mrm332]);; mvme136 ) diff --git a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog index c7e67ee8f9..f159a7d8a4 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog +++ b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog @@ -1,3 +1,10 @@ +2008-08-26 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> + + * include/hwreg_vals.h: added some settings for HSC_CM01 + * network/network.c: changed initialization code for HSC_CM01 + * startup/cpuinit.c: changed initialization code for HSC_CM01 + * startup/linkcmds.hsc_cm01: adapted memory map to HSC_CM01 + 2008-08-21 Joel Sherrill <joel.sherrill@oarcorp.com> * Makefile.am: Added bspclean.c and use shared bsppretaskinghook.c. diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h b/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h index 887670a99f..aaeff4c6ba 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h +++ b/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h @@ -21,7 +21,7 @@ #define __GEN83xx_HWREG_VALS_h #include <mpc83xx/mpc83xx.h> - +#include <bsp.h> /* * distinguish board characteristics */ @@ -92,8 +92,8 @@ #define RESET_CONF_WRD_H (RCWHR_PCI_HOST | \ RCWHR_PCI_32 | \ - RCWHR_PCI1ARB_EN | \ - RCWHR_PCI2ARB_EN | \ + RCWHR_PCI1ARB_DIS | \ + RCWHR_PCI2ARB_DIS | \ RCWHR_CORE_EN | \ RCWHR_BMS_LOW | \ RCWHR_BOOTSEQ_NONE | \ @@ -102,8 +102,8 @@ RCWHR_TSEC1M_RGMII | \ RCWHR_TSEC2M_GMII | \ RCWHR_ENDIAN_BIG | \ - RCWHR_LALE_NORM | \ - RCWHR_LDP_PAR) + RCWHR_LALE_EARLY | \ + RCWHR_LDP_SPC) #elif defined( HAS_UBOOT) @@ -175,10 +175,30 @@ * for JPK HSC_CM01 */ +/* fpga BCSR register */ +#define FPGA_START 0xF8000000 +#define FPGA_SIZE 0x8000 +#define FPGA_END (FPGA_START+FPGA_SIZE-1) + /* * working values for various registers, used in start/start.S */ +/* fpga config 16 MB size */ +#define FPGA_CONFIG_START 0xF8000000 +#define FPGA_CONFIG_SIZE 0x01000000 +/* fpga register 8 MB size */ +#define FPGA_REGISTER_START 0xF9000000 +#define FPGA_REGISTER_SIZE 0x00800000 +/* fpga fifo 8 MB size */ +#define FPGA_FIFO_START 0xF9800000 +#define FPGA_FIFO_SIZE 0x00800000 + +#define FPGA_START (FPGA_CONFIG_START) +// fpga window size 32 MByte +#define FPGA_SIZE (0x02000000) +#define FPGA_END (FPGA_START+FPGA_SIZE-1) + /* * Local Access Windows * FIXME: decode bit settings @@ -186,7 +206,7 @@ #define LBLAWBAR0_VAL bsp_rom_start #define LBLAWAR0_VAL 0x80000018 -#define LBLAWBAR1_VAL 0xF8000000 +#define LBLAWBAR1_VAL (FPGA_CONFIG_START) #define LBLAWAR1_VAL 0x80000015 #define DDRLAWBAR0_VAL bsp_ram_start #define DDRLAWAR0_VAL 0x8000001B @@ -196,13 +216,25 @@ */ #define BR0_VAL 0xFE001001 #define OR0_VAL 0xFE000E54 -#define BR3_VAL 0xF8001881 -#define OR3_VAL 0xFFC01100 +// fpga config access range (UPM_A) (32 kByte) +#define BR2_VAL (FPGA_CONFIG_START | 0x01881) +#define OR2_VAL 0xFFF80100 + +// fpga register access range (UPM_B) (8 MByte) +#define BR3_VAL (FPGA_REGISTER_START | 0x018A1) +#define OR3_VAL 0xFF800100 + +// fpga fifo access range (UPM_B) (8 MByte) +#define BR4_VAL (FPGA_FIFO_START | 0x018A1) +#define OR4_VAL 0xFF800100 + /* - * Local (memory) bus divider - * FIXME: decode bit settings + * SDRAM registers */ -#define LCRR_VAL 0x00010004 +#define MRPTR_VAL 0x20000000 +#define LSRT_VAL 0x32000000 +#define LSDMR_VAL 0x4062D733 +#define LCRR_VAL 0x80010004 /* * DDR-SDRAM registers diff --git a/c/src/lib/libbsp/powerpc/gen83xx/network/network.c b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c index a3b80dac3f..2d5f59d88f 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/network/network.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c @@ -77,6 +77,14 @@ int BSP_tsec_attach } if (attaching) { #if (TSEC_IFMODE==TSEC_IFMODE_GMII) +#if !defined(HSC_CM01) + + /* + * do not change system I/O configuration registers on HSC board + * because should initialize from RCW + */ + + if (unitNumber == 1) { /* * init system I/O configuration registers @@ -101,6 +109,7 @@ int BSP_tsec_attach mpc83xx.gpio[0].gpdir = ((mpc83xx.gpio[0].gpdir & ~0x000FFFFF) | 0x00087881); } +#endif /* !defined(HSC_CM01) */ #endif #if (TSEC_IFMODE==TSEC_IFMODE_RGMII) diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c index 95a84e197c..ff75a34adc 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c @@ -259,6 +259,20 @@ void cpu_init( void) ); SET_DBAT( 2, dbat.batu, dbat.batl); +#if defined(HSC_CM01) + calc_dbat_regvals( + &dbat, + FPGA_START, + FPGA_SIZE, + true, + true, + true, + false, + BPP_RW + ); + SET_DBAT(3,dbat.batu,dbat.batl); +#endif + #ifdef MPC8313ERDB /* Enhanced Local Bus Controller (eLBC) */ calc_dbat_regvals( diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.hsc_cm01 b/c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.hsc_cm01 index 4e944dfa2c..bbbf2ddbbd 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.hsc_cm01 +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.hsc_cm01 @@ -7,7 +7,7 @@ MEMORY { RAM : ORIGIN = 0x0, LENGTH = 256M ROM : ORIGIN = 0xfe000000, LENGTH = 8M - MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k + MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 1M NIRVANA : ORIGIN = 0x0, LENGTH = 0 } diff --git a/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am b/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am index 4c65291961..48f2f4f8a7 100644 --- a/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am +++ b/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am @@ -73,7 +73,7 @@ $(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INC $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h -$(PROJECT_INCLUDE)/bsp/irq.h: ./irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) +$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h @@ -97,7 +97,7 @@ $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bsps $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h -$(PROJECT_INCLUDE)/bsp/VMEConfig.h: ./vme/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) +$(PROJECT_INCLUDE)/bsp/VMEConfig.h: vme/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEConfig.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEConfig.h diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog index e935d4ec01..6b524a72de 100644 --- a/c/src/lib/libcpu/powerpc/ChangeLog +++ b/c/src/lib/libcpu/powerpc/ChangeLog @@ -1,3 +1,13 @@ +2008-08-26 Thomas Doerfler <Thomas.Doerflerr@embedded-brains.de> + + * mpc83xx/i2c/mpc83xx_i2cdrv.c: wait for proper end of transfer + * mpc83xx/include/mpc83xx.h: add some register definitions + +2008-08-26 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * mpc83xx/network/tsec.c: Clear the interrupt mask and all pending + events during the hardware initialization. + 2008-08-22 Sebastian Huber <sebastian.huber@embedded-brains.de> * shared/include/powerpc-utility.h: Fixed parameter evaluation in diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c b/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c index 35e9ae237d..d667584c3f 100644 --- a/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c +++ b/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c @@ -173,6 +173,11 @@ static void mpc83xx_i2c_irq_handler mpc83xx_i2c_softc_t *softc_ptr = (mpc83xx_i2c_softc_t *)handle; /* + * clear IRQ flag + */ + softc_ptr->reg_ptr->i2csr &= ~MPC83XX_I2CSR_MIF; + + /* * disable interrupt mask */ softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MIEN; @@ -561,6 +566,12 @@ static int mpc83xx_i2c_read_bytes *p++ = softc_ptr->reg_ptr->i2cdr; } + + /* + * wait 'til end of last transfer + */ + rc = mpc83xx_i2c_wait(softc_ptr, MPC83XX_I2CSR_MCF, MPC83XX_I2CSR_MCF); + #if defined(DEBUG) printk("... exit OK, rc=%d\r\n",p-buf); #endif diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h index 46333989c8..89f3ecdeb0 100644 --- a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h +++ b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h @@ -67,7 +67,7 @@ typedef struct m83xxSysConRegisters_ { volatile uint32_t sicrl; /* 0x0_0114 I/O configuration register low (SICRL) R/W 0x0000_0000 5.3.2.5/5-21 */ volatile uint32_t sicrh; /* 0x0_0118 I/O configuration register high (SICRH) R/W 0x0000_00007 5.3.2.6/5-24 */ uint8_t reserved0_011C[0x00128-0x0011C];/* 0x0_011C--0x0_0128 Reserved */ - volatile uint32_t ddrcdr; /* 0x0_0128 control driver register (DDRCDR) R/W 0x0004_0000 5.3.2.8/5-28 */ + volatile uint32_t ddrcdr; /* 0x0_0128 control driver register (DDRCDR) R/W 0x7304_0001 5.3.2.8/5-28 */ volatile uint32_t ddrdsr; /* 0x0_012C debug status register (DDRDSR) R 0x3300_0000 5.3.2.9/5-30 */ uint8_t reserved0_0130[0x00200-0x00130];/* 0x0_0130--0x0_01FC Reserved */ } m83xxSysConRegisters_t; @@ -421,7 +421,7 @@ typedef struct m83xxDMARegisters_ { volatile uint32_t imisr; /* 0x0_8080 Inbound message interrupt status register R/W 0x0000_0000 12.4.6/12-9 */ volatile uint32_t imimr; /* 0x0_8084 Inbound message interrupt mask register R/W 0x0000_0000 12.4.7/12-11 */ uint8_t reserved0_8088[0x080A8-0x08088];/* 0x0_8088-0x0_80A7 Reserved */ - struct { + struct m83xxDMAChannelRegisters_ { uint8_t reserved0_80A8[0x08100-0x080A8];/* 0x0_80A8-0x0_80FF Reserved */ volatile uint32_t dmamr0; /* 0x0_8100 DMA 0 mode register R/W 0x0000_0000 12.4.8.1/12-12 */ volatile uint32_t dmasr0; /* 0x0_8104 DMA 0 status register R/W 0x0000_0000 12.4.8.2/12-14 */ @@ -438,6 +438,65 @@ typedef struct m83xxDMARegisters_ { uint8_t reserved0_82AC[0x082FF-0x082AC]; /* 0x0_82AC-0x0_82FF Reserved, should be cleared */ } m83xxDMARegisters_t; +/* Registers in DMA section use little-endian byte order */ + +/* DMA mode register */ +#define MPC83XX_DMAMR_DRCNT_1 (5 << 24) +#define MPC83XX_DMAMR_DRCNT_2 (6 << 24) +#define MPC83XX_DMAMR_DRCNT_4 (7 << 24) +#define MPC83XX_DMAMR_DRCNT_8 (8 << 24) +#define MPC83XX_DMAMR_DRCNT_16 (9 << 24) +#define MPC83XX_DMAMR_DRCNT_32 (0xA << 24) + +#define MPC83XX_DMAMR_BWC_1 (0 << 21) +#define MPC83XX_DMAMR_BWC_2 (1 << 21) +#define MPC83XX_DMAMR_BWC_4 (2 << 21) +#define MPC83XX_DMAMR_BWC_8 (3 << 21) +#define MPC83XX_DMAMR_BWC_16 (4 << 21) + +#define MPC83XX_DMAMR_DMSEN (1 << 20) +#define MPC83XX_DMAMR_IRQS (1 << 19) +#define MPC83XX_DMAMR_EMSEN (1 << 18) + +#define MPC83XX_DMAMR_DAHTS_1 (0 << 16) +#define MPC83XX_DMAMR_DAHTS_2 (1 << 16) +#define MPC83XX_DMAMR_DAHTS_4 (2 << 16) +#define MPC83XX_DMAMR_DAHTS_8 (3 << 16) + +#define MPC83XX_DMAMR_SAHTS_1 (0 << 14) +#define MPC83XX_DMAMR_SAHTS_2 (1 << 14) +#define MPC83XX_DMAMR_SAHTS_4 (2 << 14) +#define MPC83XX_DMAMR_SAHTS_8 (3 << 14) + +#define MPC83XX_DMAMR_DAHE (1 << 13) +#define MPC83XX_DMAMR_SAHE (1 << 12) + +#define MPC83XX_DMAMR_PRC_PCI_READ (0 << 10) +#define MPC83XX_DMAMR_PRC_PCI_READ_LINE (1 << 10) +#define MPC83XX_DMAMR_PRC_PCI_READ_MULTIPLE (2 << 10) + +#define MPC83XX_DMAMR_EOIIE (1 << 7) +#define MPC83XX_DMAMR_TEM (1 << 3) +#define MPC83XX_DMAMR_CTM (1 << 2) +#define MPC83XX_DMAMR_CC (1 << 1) +#define MPC83XX_DMAMR_CS (1 << 0) + +/* DMA status register */ +#define MPC83XX_DMASR_TE (1 << 7) +#define MPC83XX_DMASR_CB (1 << 2) +#define MPC83XX_DMASR_EOSI (1 << 1) +#define MPC83XX_DMASR_EOCDI (1 << 0) + +/* DMA current descriptor address register */ +#define MPC83XX_DMACDAR_SNEN (1 << 4) +#define MPC83XX_DMACDAR_EOSIE (1 << 3) + +/* DMA next descriptor address register */ +#define MPC83XX_DMANDAR_NSNEN (1 << 4) +#define MPC83XX_DMANDAR_NEOSIE (1 << 3) +#define MPC83XX_DMANDAR_EOTD (1 << 0) + + typedef struct m83xxPCICfgRegisters_ { /* PCI1 Software Configuration Registers */ volatile uint32_t config_address; /* 0x0_8300 PCI1 CONFIG_ADDRESS W 13.3.1.1/13-16 */ diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c b/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c index c7b3169d56..2c1e47754b 100644 --- a/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c +++ b/c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c @@ -203,6 +203,10 @@ static void mpc83xx_tsec_hwinit uint8_t *mac_addr; size_t i; + /* Clear interrupt mask and all pending events */ + reg_ptr->imask = 0; + reg_ptr->ievent = 0xffffffff; + /* * init ECNTL register * - clear statistics counters @@ -211,7 +215,8 @@ static void mpc83xx_tsec_hwinit */ reg_ptr->ecntrl = ((reg_ptr->ecntrl & ~M83xx_TSEC_ECNTRL_AUTOZ) | M83xx_TSEC_ECNTRL_CLRCNT - | M83xx_TSEC_ECNTRL_STEN); + | M83xx_TSEC_ECNTRL_STEN + | M83xx_TSEC_ECNTRL_R100M); /* * init DMA control register: @@ -281,9 +286,9 @@ static void mpc83xx_tsec_hwinit /* * init MACCFG2 register */ - reg_ptr->maccfg2 = (reg_ptr->maccfg2 & M83xx_TSEC_MACCFG2_IFMODE_MSK) - | M83xx_TSEC_MACCFG2_PRELEN( 7) - | M83xx_TSEC_MACCFG2_FULLDUPLEX; + reg_ptr->maccfg2 = ((reg_ptr->maccfg2 & M83xx_TSEC_MACCFG2_IFMODE_MSK) + | M83xx_TSEC_MACCFG2_PRELEN( 7) + | M83xx_TSEC_MACCFG2_FULLDUPLEX); /* * init station address register @@ -1508,9 +1513,7 @@ static void mpc83xx_tsec_init * for HSC CM01: we need to configure the PHY to use maximum skew adjust */ - mpc83xx_tsec_mdio_write(-1,sc,31,1); - mpc83xx_tsec_mdio_write(-1,sc,28,0xf000); - mpc83xx_tsec_mdio_write(-1,sc,31,0); + mpc83xx_tsec_mdio_write(-1,sc,23,0x0100); #endif /* |